Operational Amplifier - Design

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whirl7wind77

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Can anyone tell me,
how to design a high speed, low power ( < 20 uW ) Operational Amplifier ( with supply voltage 1.2 V in 90nm CMOS ) ?
 

As fast as possible.

You need to choose a proper architecture and to make trade-off between output swing, gain and speed.
Probably the best architecture will be recycled telescopic or folded cascode with degenerated current sources, gain boosting and feedforward compensation.
 
I knew that. I found in literature that the telescopic one has low power consumption and high speed.
But I could not achieve high speed and 20 uW power consumption. Can you suggest architecture ?
 

You might need a 2nd stage with good driving capability to get the high speed.
Telescopic in itself with the limited current budget would have limited bandwidth to provide the speed.

I am assuming the by speed you mean the response to switching loads. Try a second stage as a driver which consumes minimum current in DC but is able to drive high current steps.
 

Telescopic opamp is a good choice for high-speed and low-power consumption. You can find design steps thoroughly in the following book:

Behzad Razavi, Design of Analog CMOS Integrated Circuits, Pages: 299-300

Also I attached the schematic of the circuit.
 

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Hi an_82,
This is the first circuit I tried. My supply voltage is 1.2 V.
This circuit has a problem maintaining bias points. It consumes hundreds of uW power.
 

whirl7wind77 said:
This circuit has a problem maintaining bias points. It consumes hundreds of uW power.
Click to expand...
So You doing it wrong...
The tail current source determine the power consumption in telescopic cascode. If You set proper W/L ratio for transistors in current mirror You get not more current than You assume.
 
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