operation of mos ldo in dropout

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lakshmi_k

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can anyone tell what exactly happens in the operation of a pmos/nmos ldo in the dropout region as Vin decreases?i read that as Vin decreases,along with decrease in Vds ,Vgs also decreases..hw does this happen?hw does the error amplifier operate in dropout regio?
 

The NMOS LDO always operates in the saturation region. The gate drive is always one vgs above the output. The worst case dropout is hence when gate drive is at the input voltage, where the dropout is exactly vgs.

The PMOS LDO can operate in both saturation and linear region. Worst case drop-out is when gate drive goes all the way down to gnd, with dropout defined by the product of load current and PMOS on-resistance.
 

what happens after Vin decreases below the gate drive..the nmos enters linear region n the output falls,rite...then what happens to the gate drive?hw does the feedback loop operate then?
 

IF the opamp is able to drive the gate above the input, then it will do its usual job, which is to regulate the output, with minimum dropout the same as that of the PMOS.
The problem is that this opamp will need to be supplied by a higher supply than the input voltage!
 

For an NMOS LDO you need a charge pump otherwise low dropout is not possible without the use of depletion devices.

In dropout vgs is no longer sufficient to support the load current. It happens because the error amplifier output voltage is limited. Once the output hits this limit further reducing the supply will directly reduce vgs. The feedback loop no longer works ie. you are in drop out (out of regulation)
 

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