Operating point for oscillator design

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Lathas

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How to choose the operating point of FET for negative resistance oscillator design?
 

Principally as wanted oscillator output should have symmetrical waveform so you can consider an oscillator Class-A.
But you have to choose a OP so that all oscillation conditions are satisfied in any case(temperature,tolerances,process variations etc.).Especially gm value is important and it defines also negative resistance of oscillator input which is terminated by a resonator circuit.This gm should be as much as possible to maintain negative input resistance but as low as possible to get a minimum power consumption.Please note that, high gm value doesn't mean that the oscillator will supply wanted oscillation conditions all over cases.No..
There are some constraints to choose the right OP.Oscillator design is an art..
 

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Instead of calculating the bias network, for an oscillator you should be able to adjust the best operating point by a fine tuning of the bias. During oscillation, the bias circuit with the FET develops its own voltage but this may not be at optimum.
To make a good oscillator, you need a spectrum analyzer to achieve a good output power AND a clean spectrum.
 

Lathas said:
How to choose the operating point of FET for negative resistance oscillator design?
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To answer your question it would be of great help to show us your circuit diagram, because there are several negative-resistance oscillator topologies
 

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