guomenghan
Newbie level 3
Dear Friends:
Several months ago,I have designed a two-stage OTA and fabricated in 0.18um CMOS technology.Now,I faced with some problems in testing my OTA.I have already worked out some close-loop test procedures for the OTA,however,recently I have seen some papers showing their open-loop test results using network analyzer.I have no idea about how to use this open-loop method to test my circuit,could you give me some advice as to this question.Eager for your answer.THANK YOU
Several months ago,I have designed a two-stage OTA and fabricated in 0.18um CMOS technology.Now,I faced with some problems in testing my OTA.I have already worked out some close-loop test procedures for the OTA,however,recently I have seen some papers showing their open-loop test results using network analyzer.I have no idea about how to use this open-loop method to test my circuit,could you give me some advice as to this question.Eager for your answer.THANK YOU