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Open loop -3dB cutoff frequency of folded cascode is too low

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melkord

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I have been trying to understand this for quite sometimes.

1. Why is the -3dB cutoff freq of the folded cascode that I simulate too low?

2. Which configuration is the correct one to simulate the openloop gain and phase margin?

I use open loop configuration like in the pic below.
All the MOSFET are in saturation

I take a look at this discussion, but I still do not get it.
As discussed in that thread, we do not involve or consider -3dB freq during designing, we just consider UGB.

On page 49 of this slide, the openloop configuration is different.

open_loop_config.PNG folded_cascode_v15_param_freq_ol.PNG folded_cascode_v15_param.PNG

On Baker, there is some feedback, but it is still said openloop. Ch24 Fig24.43.
 
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You can't simulate the open loop gain of a high gain amplifier, (and yours has really high DC gain) without closing a DC feedback around it.
From your plots it looks like the gm=628uS and Rout=16G at least. The -3db frequency is 1/(Rout*CL). Given that you have cascodes at the output of the amplifier and all transistors have L=2um, it is probably feasible to have Rout very big. Basically, every amplifier whose frequency response rolls off like in a 1st order system obeys the gain-bandwidth trade-off - gain*F3db=Fo where F3db is the frequency of the -3db corner and Fo is the frequency of 0dB crossing. However, you don't really care about the -3dB frequency. Every amplifier, especially with such a high gain works in a feedback configuration and the -3dB frequency of the closed-loop system is pretty much equal to the 0db frequency of the loop gain.
 
The specification that I should meet is DC gain = 80dB, fUGB = 10MHz.
so just to confirm, I think my circuit meets the spec then, even though I do not see the -3db?

is there any reason why book showed how to simulate this open loop freq response if it cannot be simulated?
 

Of course, I don't know what book you are talking about, so I can't comment on this.

If the above specification concerns the loop gain and in fact the open loop gain of the amplifier itself, yes, you probably meet it, although if you have 140dB and you need 80db, you are 60 db overboard, which is 1000 times more gain than you need.
 
@melkord
sutapanaki is right. You need to have a proper testbench configuration, that is, DC feedback loop:

ac schematic.png

Source: [ https://payhip.com/b/5Srt - "Preview" button in right top corner]

Then you AC plot should look like:

ac.png

Source: [ https://payhip.com/b/5Srt - "Preview" button in right top corner]


Baker is the excellent book. You should have everything explained there.

Please write if you have any questions/problems.
 

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