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1. Gain - should be very high. If the gain error is expected to be around 01% or 0.01, then the gain for an N-bit DAC should atleast be 2^N*1/Gain Error. So for a 8 bit DAC, the gain should be about 2^8*100 = 128*100 = 12800 or about 80 dB. High gain would also reflect into lower input referred offset. Also, this gain in the closed loop will depend on the capacitor matchings as well and hence the beta factor variation
2. GBW - Most important parameter. This defines the settling speed of the swit cap amplifier. This should be around 80~100 MHz if you need to use a sampling frequency of 20 MHz. The spec is a little bit relaxed if you have a non-resettable architecture.
3. Noise - Depends on whether this C-2C is sitting in a pipeline or not. Nevertheless, the device noise contribution from this amp should not exceed a quarter of a LSB in the worst conditions. Use a reset architecture in the switcap amplifier which lowers 1/f noise and the offset
4. Slew - Also an important parameter because it will give rise to non-linearities. Remember that the opamp has to provide enough current to slew the output, load and the feedback capacitors. You can start your first cut design from here.
5. Input capacitance: Single most important limitation for the opamp. Make sure that we should not exceed the sizing of the input pairs because these parasitic caps will have a play in the charge injection
Since analog design is a mix-match of everything, you can start your design by trying to target one of these and then meet the rest
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