OpAmp Design - help needed - newbie

[cheenu_2002]

Hi,
I am trying to design a simple opamp with a gain of 60dB. I am targetting a gain of around 40dB for the differential stage and 20dB for the second stage. I am not considering any other spec as of now. The supply voltage is 1.2V. Length of transistors is fixed at around 0.09um.
I cudnt achieve a gain more than 17dB in the first stage. I tried varying the current & the size of the input transistors, but the gain remains at 17dB or decreases from that value. I cudnt get whether I am making any mistake or is that the max gain that can be acheived. Can anyone help me with the design. I am attaching my schematic with this mail. Pls review it and suggest me some ways of improving the gain.

 

[master.ckt.breaker]

First thing, dont keep lengths of transistors so low. Keep them 0.5um atleast. I assume you are using 90nm process...? If Input pair W*L is less, it creates huge mismatch problems.

What is the tail current value? What is the output load capacitor you have used and expected UGB requirement. You have to consider these things to fix the tail current value. I dont see any load capacitor in your circuit.

Hey! It is better to do AC analysis with a negative feedback and breaking the loop.
Connect an inductor (=1GH) from o/p to inn. Connect a capacitor (=1GF) from inn to gnd. Use common mode volatge source with AC swing only at inp. i.e. Use voltage source "VDC", keep dc value at vdd/2, and ac magnitude as 1. Then measure gain.

MCB

 

[cheenu_2002]

I am using a 45nm process.
yeah.. I havent added a load cap. I am using an ideal 1pF cap as of now. Actually I am trying to learn to design. So, I dont have any realtime specs with me. I also dont know how much I can take for UGB. As I have mentioned earlier, I am mainly targeting on the gain as the first step. If you can suggest me some spec to start with, it would be great!

 

[master.ckt.breaker]

Specs for single stage opamp:
Gain 40dB
Phase Margin > 60deg
UGB 5MHz
load cap 5pf

 

[cheenu_2002]

Thanks a lot for the specs. Could you pls help me to understand how UGB determines the tail current. And I dont know how to get the mobility and Cox values to plug-in into my equations. Is there any specific file that contains these things?

 

[master.ckt.breaker]

The model file which you include for simulations will have all these information like u0, vth, tox. from tox you have to calculate Cox. Cox = (ε0 * εr) / tox. εr of silica = 3.9.

For other dependencies like ugb, tail current value, go through CMOS design book by Hollberg. In that book, you will find step by step design of single stage opamp.