Where is R12?R9 & R11 is just voltage divider. if you change the R9 value the output value will change. So if you want to make it stable then connect a capacitors parallel between R11 & R12. So that you will get stable output.
Where is R12?
The circuit is not unstable, I'm simply trying to understand the concept of gain less than 1 can be unstable.
The circuit is not unstable, I'm simply trying to understand the concept of gain less than 1 can be unstable.
Is it correct to state that with a non-inverting topology where gain = 1+ feedback ratio that a unity gain stable op amp will be inherently stable, and that only with inverting configurations with Rf/Rin < 1 that the circuit might be unstable?
You don't want to add a capacitor between R9 and R10. That will cause peaking in the circuit response.Sorry its R10
No. If the op amp is non-inverting unity-gain stable (as most are), then any combination of Rf/Rin will also be stable, since the equivalent non-inverting gain is always ≧1...................................
Is it correct to state that with a non-inverting topology where gain = 1+ feedback ratio that a unity gain stable op amp will be inherently stable, and that only with inverting configurations with Rf/Rin < 1 that the circuit might be unstable?
Well, you stated that "with Rf/Rin < 1 that the circuit might be unstable", and that's not the case. Even with Rf/Rin < 1 the op amp will still be as stable (or more stable) as compared to a non-inverting gain of 1 (which is the worst-case for stability)................
Thanks, I think we both stated the same thing.
R10 in the original circuit might be intended as compensation for input current generated offset, but it's completely useless for a CMOS amplifier like OPAx348. The method is only appropriate for bipolar OP without internal input current compensation, in other words for |Ib| >> |Ios|.It seems R10 has no purpose in the original diagram?
Did you learn anything from the previous discussion? The circuit is stable with any passive source impedance connected to J2.Focusing on the inverting topology, would this circuit be considered unstable?
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