Bob_C
Member level 2
Until now, DSP implementation in FPGAs and ASICs was generally carried out by companies with large R&D budgets and our software was used by them. During this time, we would occasionally made offers like this in order to give individual users a chance to get experience in this area. With the advent of software defined radio, many more are now becoming interested in creating fpga based digital radio projects and ONEoverT gives them a chance to explore this area of decoding and enhancing signals
Normally priced at 900GBP, this is the completely unlimited version of one of the most widely used DSP applications. This release of ONEoverT with no restrictions, may be used to design FIR, IIR, Raised Cosine, Hilbert Transforms and a range of other filters. It is being offered at a one time price of 25 GBP (yes...twenty five) to help students and hobbiests and anyone now working from home enter the subject of digital signal processing. This is ideal for use with any microcontroller.
For this onetime offer we are also including the plug-in VHDL module for designing FPGAs and ASICs. This allows generation of synthesizable VHDL, testbench and test vectors for easy implementation on any ASIC/FPGA. You are not tied to any vendor and the generated code will work with Intel/Altera, Xilinx, Lattice Semiconductor and all ASICs. ONEoverT optimizes the output code based on the designer inputs to gives you an efficient implementation of your requirements.
Visit Tyder
https://www.tyder.com
Normally priced at 900GBP, this is the completely unlimited version of one of the most widely used DSP applications. This release of ONEoverT with no restrictions, may be used to design FIR, IIR, Raised Cosine, Hilbert Transforms and a range of other filters. It is being offered at a one time price of 25 GBP (yes...twenty five) to help students and hobbiests and anyone now working from home enter the subject of digital signal processing. This is ideal for use with any microcontroller.
For this onetime offer we are also including the plug-in VHDL module for designing FPGAs and ASICs. This allows generation of synthesizable VHDL, testbench and test vectors for easy implementation on any ASIC/FPGA. You are not tied to any vendor and the generated code will work with Intel/Altera, Xilinx, Lattice Semiconductor and all ASICs. ONEoverT optimizes the output code based on the designer inputs to gives you an efficient implementation of your requirements.
Visit Tyder
https://www.tyder.com
