Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

On Die Termination in DDR3

Status
Not open for further replies.

tramu

Junior Member level 3
Junior Member level 3
Joined
Jul 5, 2006
Messages
27
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,483
Dear sir,

I would like to know what is the purpose/use of On Die Termination control pin in DDR3 memory chip.

When will it get asserted by controller (during read/write)?

Can this pin be permanently pulled HIGH at DDR3 chip to enable On Die Termination ?

Please answer my query.....

Regards,
Thulasi
 

From what I know ODT is parallel and switched off during the write - hence, when the DDR is receiving data - the ODT is switched off all other times.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top