on-chip interconnect modeling

[div]

Hi all:

One topic in which I am interested is the
comparison between EM solvers and Device solvers
for on-chip interconnect modeling.

In order to model a metal on-chip, such as
an interconnect over a multilayered
SiO2 & Si structure, I limit my solution with two
choices:
1) Using EM solver (Fullwave/Quasi-TEM),
2) or using device simulator.

The problem with EM solver as far as I know
is how to model a very lossy substrate (highly doped
silicon) and the RLGC elements extracted should
be frequency dependent.

I am not very familiar with device(semiconductor)
solver. But I hope it/they can provide frequency-dependent
RLGC element or other format which can be compared
with EM solvers.

You suggestions are welcome from either or both
side(s) of the solvers.
I list several solvers below but you are
welcome to show your opinion beyond the list.

EM solver
1) ADS momentum
2) CST Microwave studio
3) HFSS (my experience: not accurate for lossy media)

Device(semiconductor) solver
1) ISE TCAD
2) Silvaco ATLAS
3) Synopsys MEDICI

If someone could show one comparison, that would be
wonderful.

Thanks for your attention.

Div