Off-the-shelf flyback transformers for a 3-phase inverter gate drivers

[HippopotamusXD]

I'm in the process of developing a 3-phase inverter and I'm designing a flyback DC/DC for the gate drivers. I feel this is a common use case so I expected I'd find more flyback transformers with a single primary, an aux and 4 secondary windings (one for each phase high-side switches and one for the low-side switches). So far I've been able to find only TDK VGT series, but I'm not happy with the turn ratios and inductances.
https://product.tdk.com/system/file...ate-drive/catalog/trans_gate-drive_vgt_en.pdf

Am I wrong in assuming this would be a common use case and I'd expect to find more transformers, or am I just not searching for the right thing?

This will not go into production, I'm just looking to make a few prototypes so I'm looking to avoid designing my own custom transformer.

 

[KlausST]

Hi,

why flyback?

I´d tend to push-pull.

Klaus

 

[HippopotamusXD]

why flyback?

I´d tend to push-pull.

I'm more familiar with working principle of flyback transformers. It's my understanding that push-pull configuration would be used for more high powered applications? Flyback seemed like a cheap and easy topology to implement. Is there a reason why push-pull would be better in this situation?

 

[KlausST]

Is there a reason why push-pull would be better in this situation?

Flyback needs a regulation (any feedback). And flyback needs the (big) core to store (all the transformed) energy. Simple electronics.

There are the cheap DCDC converters. Like AM1D-1515. They also provide high voltage isolation. They are low power and have non regulated outputs. So no flyback.
Not a bad choice.

Klaus

 

[Easy peasy]

Actually - flyback for this app needs no regulation - a flyback is a constant power topology - if the Vin and the freq and the ON time are fixed - you can have multiple secondaries - each with their own 5W zener to limit Vout to the zener voltage - say 16V each.

The power in the flyback is Freq x 0.5 Lpri Ipk^2 ( less losses ) so if you need 6 outputs at 1W each - make a 6W flyback and let the zeners do the regulation. ( the control can be a buffered TLC555 timer with fixed freq and duty cycle driving the flyback fet ).

This is a very robust system.

you can also choose any transformer that will support the V.uS on the pri ( no gap ) and add an inductor in parallel across the pri to create a flyback.

you can alternately put chokes across each Tx output ( often easier - also you can have chokes on the pri and sec's )

( a flyback is essentially a coupled transformer and inductor )

 

[KlausST]

let the zeners do the regulation.

This is the "no feedback" regulation. The disadvantage is that it wastes all the power.

Klaus

 

[Easy peasy]

The disadvantage is that it wastes all the power.

At 6W typical for a GD situation - the power wastage is almost immaterial - however, if the gate drive itself uses 0.8 W ( fairly typical ) at nominal flat out - then in fact very little is wasted.

--- Updated Thursday at 3:17 AM ---

and the Zener still limits - or regulates - the Vout.

 

[HippopotamusXD]

The power in the flyback is Freq x 0.5 Lpri Ipk^2 ( less losses ) so if you need 6 outputs at 1W each - make a 6W flyback and let the zeners do the regulation. ( the control can be a buffered TLC555 timer with fixed freq and duty cycle driving the flyback fet ).

This brings up a point for calculating power, I'm not actually sure how to do the power calculation. I plan on driving 6 pairs of MOSFETs at 18V 6A meaning peak power would be around 110W, but that would last a ~30ns and then for the next ~62000ns no power would be drawn. I'm assuming I still need to size the flyback for the 110W peak, right?

As for the 555 solution, driving the flyback with a fixed frequency and duty cycle seems odd to me, as I'm not expecting a constant power draw. Wouldn't the primary current rise as no power is drawn on the secondary?

 

[Easy peasy]

The power for the gate drive is the AVERAGE power - peak power is generally always supplied by local decoupling caps - simply get one gate drive going into a dummy load e.g. 5n6 paralleled with 2k2 - and measure the ave power required

as a rule of thumb - driving a big mosfet needs about 40mA ave at say 15V - this is 600mW.

As for the 555 solution, driving the flyback with a fixed frequency and duty cycle seems odd to me, as I'm not expecting a constant power draw. Wouldn't the primary current rise as no power is drawn on the secondary?

shot answer = no, you appear to have overlooked the explanation regarding constant power, most of the power goes into the GD ckt, when the gate drive is constant low - the excess power goes to the Zener.

how to do the power calculation. I plan on driving 6 pairs of MOSFETs at 18V 6A meaning peak power would be around 110W, but that would last a ~30ns and then for the next ~62000ns no power would be drawn. I'm assuming I still need to size the flyback for the 110W peak, right?

This comment makes me fear very greatly as to the success of your endeavour.

 

[HippopotamusXD]

shot answer = no, you appear to have overlooked the explanation regarding constant power, most of the power goes into the GD ckt, when the gate drive is constant low - the excess power goes to the Zener.

You're right, everything after the comment i replied to completely went over my head, makes sense now.

This comment makes me fear very greatly as to the success of your endeavour.

Learning is a process. I've never worked with magnetics, this is the first time I'm actually going deep into the calculations for a flyback. Peak power is provided by decoupling caps makes perfect sense... once you hear it. If my uni wasn't trash maybe someone would have mentioned that to me.

as a rule of thumb - driving a big mosfet needs about 40mA ave at say 15V - this is 600mW.

Just want to ask about this, to calculate the average current I'd take the average current during the gate charge period, I_avg, multiply it by the time it takes to charge the gate, t_on, and divide by the whole switching period, T?

so (I_avg * t_on) / T

For I_avg = 6A, t_on = 100ns and f_sw = 16kHz that gives 9.6mA or 0.17W@18V if my understanding is right

 

[KlausST]

This comment makes me fear very greatly as to the success of your endeavour.

Indeed.

Designing an inverter not only needs the understanding how to calaculate voltage, current, power.
It also needs to understand how to desgn a circuit regarding high current, high voltage and high frequency.
(Mind: with high frequency, it´s not meant the switching frequency, but the effects of switching power (voltage, current) with sharp edges. )
Not follwing these rules will result in ringing, oscillation, increased heat dissipation, self destruction of the semiconductors.. which may appear after days, weeks, moths and result in short circuit, explosion, fire.

Also it needs to follow regulations according:
* EMI/EMC. wired radiated noise
* Safety. Like how to select the correct devices, to know about creepage distances and isolation barriers. Testing voltages..
Besides the legal problems ... you should know that you be held resposible for any external device malfunction (maybe emergency radio .. nearby your inverter) as well as injures and death caused by ignored safety standards. It´s not safe to use devices that are specified to widthstand 230V for example, regarding safety they need to widthstand thousands of volts to pass the tests.

Designing an inverter ... is not an easy task.
I´d recommend you to have at least 3 years of experience designing electronics. Especially high current, high voltage, switching applications ... while also studying safety regulations and other regulations for legal operation.

Klaus

 

[HippopotamusXD]

Thank you for the concerns, I'm aware this isn't an easy task and I don't expect this to go into production any time soon. I have experience with designing automotive electronics for my formula student team, but this is the first time any of us are doing anything power electronics related. Thinking about magnetics of a flyback and high speed switching is a lot different to thinking about impedance of an USB, HDMI, precision OP-amps or IMU's. I'm merely building foundation for someone to continue my work at a later stage, trying to find as many questions and concerns as possible and hopefully resolve some of them.

 

[Easy peasy]

Just want to ask about this, to calculate the average current I'd take the average current during the gate charge period, I_avg, multiply it by the time it takes to charge the gate, t_on, and divide by the whole switching period, T?

so (I_avg * t_on) / T

For I_avg = 6A, t_on = 100ns and f_sw = 16kHz that gives 9.6mA or 0.17W@18V if my understanding is right

There is more to it than this as any gate drive cktry is not 100% efficient - build a gate drive, attach a fet or a dummy load and measure.

 

[cupoftea]

You can also use flyback and reg the sec's by reg'ing the aux coil.
Just buy your own core and bobbin and wind it yourself.
Its very easy for you. Bit of dummy load on the aux coil.
The pri and secs, when they conduct, should put the flux in the same direction as each other.
So use right hand corkscrew rule.
Make each coil cover more or less the whole bobbin width.
Sandwich all secs and aux within two pri layers...so split the pri
into two series halves.

You just need a bobbin with enough pins. Unless you just use loose ends and solder them to PTHs in your PCB.

Beware if doing say one flyback for the six fets of an inverter.....then this means routing switching nodes all over the board = bad news..
so you may prefer to do just like a separate gate drive transformer thing for each top fet. Then either use them to drive the fets directly, or to make a high side drive
supply.
You can buy 1:1 gate drive transformers all over the web.....just check the v.us figure in the datasheet is enough.