OD layer what does it mean in TSMC process

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pawan_nayal

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od layer

Can anyone explain what is OD mask for in TSMC process. From process flow it appears that it defines STI.Why they call it diffusion layer then ?


Thank you.
 

od diffusion

It stands for "active diffusion". It defines diffusion of active area (transistor's source and drain). Other diffusion such as diffusion resistor is not defined by this layer.
 
od tsmc

The sizes of MOS is up to the OD area.
 

tsmc od layer

It stands for "active diffusion". It defines diffusion of active area (transistor's source and drain). Other diffusion such as diffusion resistor is not defined by this layer.
Click to expand...

How about area below Gate oxide ? OD includes it but does not go thru diffusion.
 

what is od layer

OD Oxide Diffusion ?? It shows where you dont have FOX or deep trench isolation. It usally denotes some active region of sorts..

SRivats
 

tsmc od


Sorry. It should stand for "oxide diffusion". It defines active area: source, drain and those under gate.
 

layout od

hi,

there is one more layer called OD2 in TSMC, what's the purpose of this layer ?

Also to create a active region (N+ S/D in NMOS), and (P+ S/D in PMOS), what is the need to have a seperate Nimp and OD layer for NMOS and seperate Pimp and OD layer for PMOS ?
 

cmos od layer

OD2 -> Another Oxide Diffusion usually thicker than OD.

Seen usually in dual-voltage CMOS process.

Presence of OD, OD2, PIMP, NIMP seperately is to allow as many voltage nodes as possible in a given CMOS process. You can also have OD3, which can be low-leakage device OD layer, or it can be very high voltage OD. It all depends on the Fab.

Hope it helps....

Srivats
 
layer od

Hi,
for better understanding of layer you can go through hercules_DRC file for 0.18u tech. It having all the information about layer use in .18u technology.
If you read Hercules_LVS file, then you will learn more.
 

od active region

HI ,
OD stance for oxide diffusion .which is used for defining active areas(both p & n active areas).NIMP & PIMP is used define type of doping .OD2 is used to define the thickness of the gate is more (high voltage device ex 2.5v).
 
od cmos

An experianced layout engineer must have knowledge of all layers in a process before starting a new project.
Its vital that you know this so simple mistakes dont happen...

Each layer will be specified in the design rules or seek further information from either the drc deck or the foundry.
 

what is the od layer

it's the diffusion. OD2 used for high voltage.

sometimes named as CPD or CND.
 
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