gezzas525
Full Member level 3
Anyone used or designed any of these, currently having problems solving a carry issue when cascading single bit slices of these full adders, Iam using 2-phase non-overlaping clocking, each segment alternating slice is clocked in anti-phase, couldnt find anything on the web about this. I was told INTEL uses dynamic adders in thier CPUS, anyone?
KLEOS
KLEOS