Non overlapped clock generation

[person]

Hi,

Is it possible to generate non-overlap clock with equal F1 ansd F2 ?
If so yes then how to generate it.

Any help would be highly appreciated.
person

 

[gevy]

No, non overlapped clock signals have duty cycle some less 50 %.

 

[person]

obviously non overlap means it should be less than 50% but i am asking is it possible to generate equal pulse width(30% high for F1 and 30% high for F2, or it might be 40% but both should be same) for F1 and F2.

person

 

[VVV]

If the duty cycle is not important, then ty this.
Unless I made a mistake, this circuit should produce two signals with 25% duty cycle, but non-overlapped.

Please post if it does not work. I drew it in a hurry, got to go to a Christmas party.

 

[borodenkov]

yes, it is possible. The basic circuit consists of 2 NOR gates and a row of inverters for delay. I do not have a picture at hand, look in any book about SC-filters (i.e. the chapter in Davis&Martin).

 

[yaxazaa]

The Duty cycle cannot be 50%. Use two nor plus delay will work