the8thhabit
Member level 1

Hello!!
I am designing a fully passive noise shaping SAR ADC structure like the one shown below and I have a question.
I want to design a fully passive sar adc with 12bit ENOB using a 10bit CDAC with monotonic structure. For monotonic structure, it is better to design the input transistor as pmos because the comparator operates at a voltage below 0.5VDD, but if I want to use a multi-input comparator as shown in the figure below, is it correct to design the pmos transistor as input?
I am designing a fully passive noise shaping SAR ADC structure like the one shown below and I have a question.
I want to design a fully passive sar adc with 12bit ENOB using a 10bit CDAC with monotonic structure. For monotonic structure, it is better to design the input transistor as pmos because the comparator operates at a voltage below 0.5VDD, but if I want to use a multi-input comparator as shown in the figure below, is it correct to design the pmos transistor as input?