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noise shaping sar adc

the8thhabit

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Hello!!
I am designing a fully passive noise shaping SAR ADC structure like the one shown below and I have a question.
I want to design a fully passive sar adc with 12bit ENOB using a 10bit CDAC with monotonic structure. For monotonic structure, it is better to design the input transistor as pmos because the comparator operates at a voltage below 0.5VDD, but if I want to use a multi-input comparator as shown in the figure below, is it correct to design the pmos transistor as input?

1738559080551.png
 
I don't think it matters how many inputs do you have in your comparator - the input range matters. If all of your inputs will be below 0.5Vdd - it's good to use all PMOS. If some of your inputs would be around 0.5Vdd or more, you probably have to add an NMOS pair as well, but that will decrease the BW.
 


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