No copper pour beneath Buck switching node?

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Hi,
Just seen layout for a Buck prototype from an external contractor. Its 24V and 0.5A out and 32Vin. Uses Monolithic TPS5401 controller. Its on a 2 sided PCB
They have failrly well minimised the area of the switching node. However, they have not put ground pour under the switching node, presumably because they fear the switching node will introduce noise into the ground. The Bootstrap cap obviously has switching nodes on each of its terminals....and there is no copper pour underneath that either.

This abscence of copper pour in this place has meant that the current loop from the "innermost" input capacitor, and through the FET and inductor, and then on through the "innermost" output capacitor, is unfortunately wider in area than it needs to be. This is unfortunate.
(By "innermost", i mean 'nearest to the switching FET'.)
Is it a good idea to avoid having ground copper pour beneath a switching node?...even if it makes the switching current loops bigger in area?
 

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Seems to be a lot of disagreement on this detail from
SI / PI gurus.

For our POL chips' EV boards we kept copper from
under the SW node because it pumps edge energy
right into the reference plane through parasitic C.
Also kept it from under the inductor, an open bobbin
type that would induce eddy currents.

I'd recommend a straight matchup. Make a version
with ground plane pervasive, and excluded (or slotted
below the inductor if you want ground plane continuity
but not eddy currents). Or maybe add soldered-on
Cu foil to represent the ground plane's effects if you
don't want to outwait the board-spin, board-stuff
cycle to get insight.

Run 'em both, test 'em both, "by bloodshed do the
gods make known their will".

Otherwise you're stuck with the conflicting bloviations
of experts in the (EM) field. When what you want is
just "least badness".
 
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Thanks, i must admit, i do remember getting a circuit using a a LNK302 1W HV Buck (rectified 230VAC) through conducted EMC once. It was a common mode problem mostly, and due to the Buck switching node pumping emissions into the earthed heatsink below it. I solved the problem by minimising the switching node, and shielding the switching node from the earthed heatsink with GND copper pour. This is why i wonder why its said to be bad to put GND pour under a switching node....after all, it did the trick with the LNK302 Buck.
 

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Copper "return point" likely would help radiated EMI
and -maybe- conducted EMI but doesn't necessarily
help basic operation.

With high side / VIN referred current mode control
we saw the "ground banging" from SW, couple to
VIN through the close-in decoupling caps and that
ringing then made CMC uncertain and a falling edge
jitter characteristic that seemed to bother customers
who looked at it (and likely a low grade efficiency
detractor, as this jitter means current will be "sloshed"
back and forth through the buck inductor, cycle by
cycle, rather than a consistent pumping to the load.).
Additive to the inductor ripple current.
 
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In the following video, from 47:30 to 48:12......


...... it discusses that putting ground copper pour directly under switching nodes (in this case its the switching nodes inside a micro) is a good idea.
If it was a bad idea to put ground pour under an SMPS switching node, then it would also be a bad idea to put ground pour under a micrcontroller. ...But most layouts feature ground pour under a micro. So it seems that ground pour under an SMPS switching node is fine?
 

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"introducing noise" into gnd sounds nasty, but if you don't have any copper under the switching node, then where do the electric field lines from the switching node terminate? Will that new configuration make your system better or worse from an EMC standpoint?

gnd is generally the ideal place to dump unwanted high frequency signals, as it's usually the lowest impedance node in the whole design. If you're worried about gnd bounce causing problems with signal integrity, then that's where you need to manage your grounding scheme to ensure those return paths aren't shared with sensitive gnd-referenced signals. Or just use differential signals.
 
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Hi,

I usually recommend a solid GND plane, especially for not that experienced PCB designers.
In my eyes it has more benefit than disadvantages.

Now to the switching node:
Here a power plane shields the electric field in ine direction.
On the other hand it causes a stray capacitance. This capacitance will have influence on the switching node regarding dV/dt and tge resulted ringing.
I don't think the current in the GND plane causes much problem, because it is very limited in area and usually causes compensation current in the traces.
I did no simulation and did not do tests on this, but I expect - if the ringing does nit cause any additional problem, then the whole GND plane does not cause big problems, especially not regarding EMI.

I am curious what a simulation or a test on real hardware tells. Something new to learn...

Klaus
 
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