nmos gate connects to vdd directly

can the NMOS gate be directly connected to VDD, or PMOS gate be directly connected to GND?
does it will have relibility issues? such as gate breakdown, etc.
usually, a series resistor will be used, what is the role of this series resistor?
thanks.

lhlblue said:

can the NMOS gate be directly connected to VDD, or PMOS gate be directly connected to GND?

Click to expand...

Yes.

lhlblue said:

usually, a series resistor will be used, what is the role of this series resistor?
thanks.

Click to expand...

What is it in series with? Can you show a circuit so we know what you're talking about?

thanks.

Gate resistors are often used with MOSFETs to prevent oscillation.

It can be if the voltage is less than the maximum Vgs rating (typically ±20V).

lhlblue said:

... usually, a series resistor will be used, what is the role of this series resistor?

Click to expand...

In a start-up situation a high series resistor in combination with the MOSFET's input capacitance could delay the gate loading, so creating a slow current rise.

A small resistor in series with the gate is often added to minimize ringing of the gate voltage when the MOSFET is being used as a high speed switch.

here, the mos is used as a linear-region resistor, and its W/L=1u/10u. then, is there some problem?

A MOSFET as bypass capacitor may be "de-Qed" to keep supply
rails from ringing. Large scale ringing could overstress the gate
(Vdd+crest). But the resistor can't prevent gate damage.

MOS gates to major rails often is an antenna violation. A
resistor can get you past the "letter of the law" even if it
does not mitigate actual antenna charging (esp on SOI
where the resistor is not in fact an "antenna diode" if
it's a diffused / implanted type).

The wrong value of gate resistance can make cascodes
act like inductors and stuff like that. You want to look
for undesirable things like overshoots or gain peaking if
this is anything analog-ish. But a gate resistor on a
current mirror rack can also be used to overcome some
lag in the weakly driven gate network if it's sized right.