Newbie FPGA question... What do I need (from A to Z)...

Well, I have to say that I consider myself as an expert in many fields, but when it come to FPGA, I'm a total newbie (again... oh well )

Well, my question is simple (is it?)

I wish to design with FPGA. I leared a bit about some HDL language, I know about FPGA (the theory at least... for the practical side, a little less...) but my question is more about the implementation. Simply put, suppose I have an idea (design idea), and wish to implement it in FPGA (let's suppose it's Xilinx, Spartan... it could be other but for the moment, I'll concentrate on those).

What tools do I need (softwares...)?

Is there a simple tool that take me from design entry to the bitstream generation, passing via simulation, P&R, ...? What about the Xilinx ISE? Or do I need a zillion tools?

If multiple tools are required, what do I need (design entry, simulator, synthesizer, ...). Well, that question is also about asking personal prefferences... (still with Xilinx in mind)

Many thanks in advances...

Xilinx ISE can take you from HDL to FPGA bitstream, you will also need a simulator (Modelsim sounds like a good option for you). In addition to this, ISE's synthesis tool is not as good as the other commercially available FPGA synthesis tools, so if you have a large design or want to clock it very fast, you might want to get Synplicity Synplify as well.

ISE can do every thing for you except HDL simulation. If it is your first time to use FPGA, Altera is a better alternative. Altera's SW is easier to use and includes simulator.
Basically, you can handle FPGA using ISE+modelsim

1. Design entry : ISE
2. HDL Simulation : modelsim
3. Synthesis: ISE
4. Place and route: ISE
5. config file generation: ISE

More powerful tool chain:

1. Design entry : Mentor FPGAdvantager
2. HDL Simulation : modelsim
3. Synthesis: Synplify pro
4. Place and route: ISE
5. config file generation: ISE

I believe it all depends on budget, you may use the ISE webpack "free" and include xilinx synthesis tool XST but it doesn't support all Xilinx FPGAs, you may try to see a free simulator there are some on the internet or get an evaluation license for any simulator, however if your design is complicated these simulators will not help. you will have then to get another higher level simulator.
The Mentor graphic FPGAdv it is very expensive, you won't need it now "I don't like it in fact"

note. "you should start with some simple designs before you go ahead with your project just to get custom with the FPGA"

Thanks all...

What about ActiveHDL for design entry? I heared it integrate the whole design flow in simple centralized interface.

Anyone used ActiveHDL?

I have used the all the FPGA tools above talking about, the activeHDL is the most easy one for newbie i think.

Big Boy said:

Thanks all...

What about ActiveHDL for design entry? I heared it integrate the whole design flow in simple centralized interface.

Anyone used ActiveHDL?

Click to expand...

for kids... All wonderful and beautiful,but too many litle bugs,which together make bad work...
For true work use native tools or realy hard tools -ModelSim,Synplify.

It's easy to use Active HDL to program and simulate VHDL based code, however Active doesn't synthetise and you need another program like Synplicity Synplify or ISE.
It's good to start and for editing code: it has aut-complete and aout-indent feature, it's fully colored (like Delphi, Visual Studio) etc. But it's all cosmetic feature. I like it to edit. I recomend Active to edit and simulate and as you become more familiar with HDL goes to ISE.

So, the following combination would be a good choice?

Active-HDL for designing
ModelSim for simulating
Synplify for synthesis
ans the native tool for P&R and bitstream generation (ISE)

Though, I guess I don't really have a choice to learn how to import/export files through the different softwares...

Can ModelSim simulate at different levels (HDL, post-synthesys, post P&R)?

You basically have it down.. except that you need to think of aldec and modelsim as basically the same tool.. both handle design entry and simulation, although aldec sorta sucks.. Design entry really only requires a editor.. which most simulation tools have built in (aldec and model do)..

As for back anotating the timing back into the simulation.. yes you can do it with modelsim using the netlist file and the .sdf.. Im sure aldec also does it..

jelydonut

hi

when u purchase the development kit from the vender, they gives u the supporting tools also which r sufficient to start with. these tools have the limited capabilities. u can also use other tools as per ur requirement. to have a complete design what u need is fisrly a hdl compiler which will compile ur program which u wrote in hdl. then u need a simulator where u can see the output of ur program in the waveform form. when u r satisfied with it then u want to impliment the design n for that u have to generate the netlist which tells the fpga which connection where and how has to be made for that u need a synthesis tool. after ur program is synthesised then u need to have some timing constraint which can optimise ur design to operate at that frequency of the clock for that u need a timing contraint editor. u also need a tool which can tell ur fpga that where and at what location which pin of the design should be placed. and at the end u need a tool which should take the input as netlist, the timing constraints and the pin constraints and has the ability to convert the input to the bit stream which is going to program the fpga. and finally u need a tool which can upload ur program to the fpga and u can physically verify ur design. this is the complete process for the design to be implimented. I'm using the Xilinx fpga and they have provided the complete bundle of these tools under the name of the software ISE. the advantage of using this bundle is that it is very cheap compared to the induvidual tools and secondly the protability and switching between the tools is very easy and is with just with a couple of clicks without remebering the varous files which can become cumborsome. but these tools what they provide also have some limitation of theirs so we have to have a trade off which depends upon ur requirement and the budget. this is the complete clear and the best picture which i can provide u. rest depends on u.

regards
ashish