JineshKB
Junior Member level 1
Sir ,
I used Cadence RTL compiler to generate the netlist.Then tried to do netlist simulation in NCLAUNCH
files used netlist.v (netlist generated by rc) and test bench
When I compiled there was no error but upon elaborating test bench am getting this error
but am getting this error
ncelab: *E,CUVMUR (/home/jinesh/Desktop/test1/netlist.v,18|21): instance 'stimulus.accu1.\acc_reg[7] ' of design unit 'DFFTRX4' is unresolved in 'worklib.accu:module'.
I used Cadence RTL compiler to generate the netlist.Then tried to do netlist simulation in NCLAUNCH
files used netlist.v (netlist generated by rc) and test bench
When I compiled there was no error but upon elaborating test bench am getting this error
but am getting this error
ncelab: *E,CUVMUR (/home/jinesh/Desktop/test1/netlist.v,18|21): instance 'stimulus.accu1.\acc_reg[7] ' of design unit 'DFFTRX4' is unresolved in 'worklib.accu:module'.