Negative Voltage Regulation using LDO in Cadence Virtuoso

[ErenYeager97]

I have a negative rail -10V generated from a switched cap charge pump (CP) and want to regulate it.
The rail varies +/-1V over the full load and have to stabilise to a specific voltage -7V.
Power efficiency isn't a concern for the application.

Linear regulator seems to be the most used method with an error amplifier and a pass device which
is an NPN or NMOS mostly.

I used an opamp designed by someone else for a different application and connect it to a big W/L
NPN/NMOS but sweeping the VIN shows no regulation.

The LTspice simulation is shown and the Cadence schematic is identical to it (with PDK devices):

I have seen positive LDO papers and they custom make the OTA/OPAMP for the
desired pass transistor gate capacitance etc. Would it be better to start making my own
OTA and do compensation specific to my pass device or should I keep on trying with
the pre-made and compensated OPAMP from a previous designer

 

[BradtheRad]

Quick and easy voltage regulation. For negative region uses PNP and 7.7v zener diode. As an alternate 7.7v can be obtained from a mix of led's and diodes.
Supply varies from 9 to 11V. Load is referenced to ground.

 

[ErenYeager97]

I have tried this method but the voltage regulation isn't very good ~150mV/V. Do you think regulation could be done with an opamp or OTA?

 

[KlausST]

Hi,

I´d use an UA7907 or LM7907 ...

There are other ready to buy -7V voltage regulators. And for sure adjustable ones.

And for IC design, I guess there are example designs in the internet / libraries / IP...

Klaus

 

[ErenYeager97]

Hi,

I´d use an UA7907 or LM7907 ...

There are other ready to buy -7V voltage regulators. And for sure adjustable ones.

And for IC design, I guess there are example designs in the internet / libraries / IP...

Klaus

Can't use external or IP parts as I am working directly on the silicon

 

[KlausST]

Can't use external or IP parts as I am working directly on the silicon

I referred to a "ready to buy" component, because you showed "ready to buy" devices like:OP747 , 2N2222 ... in your post#1.

Klaus

 

[nitishn5]

The problem of using a pre-designed opamp is the question of whether it is suitable for your application.

In your application the loop has both the opamp and the pass transistor (NPN/NMOS) in the loop. Is it still stable? Does the opamp output common mode match? Etc? Etc?

Another approach would be to use a vcvs from the cadence analogLib library as your opamp. Give a decent amount of gain (~500/1000). With this, see if your circuit is functional. From there you will have to back calculate the specification for the opamp(error amplifier) and see if you can custom design one for it or if any of your colleagues already has one.

PS. Unless you are using a specialized process, if you plan to use an NPN, do check the beta. Vertical NPNs/PNPs from standard CMOS processes have crappy beta.