Negative delay in Primetime

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ruanwang

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Hi everyone,

I have a question about negative cell delay in pt. Could you show mw where does the negative delay come from?

BR.
 

ruanwang said:
Hi everyone,

I have a question about negative cell delay in pt. Could you show mw where does the negative delay come from?

BR.
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WOW get me some of those gates! I'd sure like to get a cell library that has negative gate delays, that would be awesome to have a design that finishes calculations before the data or the clocks arrive! :thumbsup:

I have an feeling I know what you are asking, but your question is vague and can not be answered as stated.
 

Don't get me wrong ads..
I mean when I analyze timing report from pt, some cells/nets have a negative delay in the report.
But I dont know where they come from. Maybe the threshold slew of output pin is smaller than input pin.
 

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