Negative capacitance and delay

[carbon9]

negative capacitance

Hi all,

There are some devices such as tunnel diodes or some new generation nano devices that seems to have negative parasitic capacitances. When it comes to the calculation of the delay of these negative capacitance devices, I'm a lot confused. For example, if we consider R(-C) circuit as follows:

**broken link removed**

Then the delay is T=0.69R.(-C) which is negative. It must be wrong I think because signal approaches to Vout before applied to Vin:?: How can we calculate the delay of this negative capacitance RC circuit?

Cheers,
carbon9

 

[LvW]

negative capacitance generation

Hi all,
There are some devices such as tunnel diodes or some new generation nano devices that seems to have negative parasitic capacitances. When it comes to the calculation of the delay of these negative capacitance devices, I'm a lot confused.
Then the delay is T=0.69R.(-C) which is negative. It must be wrong I think because signal approaches to Vout before applied to Vin:?: How can we calculate the delay of this negative capacitance RC circuit?
........

At first, what "delay" are you speaking of ? An RC circuit exhibits a frequency dependent phase shift - and has no specific "delay"-characteristics. At a time equal to 0.69*RC the output has reached 50% of the maximum. That´s all. But that´s not a delay parameter.
Secondly, You are not allowed to transfer formulas from classical passive circuits to other artificial - and in this case: ACTIVE - circuits. A negative capacitance does NOT exist as a part in reality. It can be realized only with amplifiers and incorporates a current source. Thus, you cannot simply apply formulas derived from other circuits.

 

[carbon9]

active negative capacitance

Thanks for the answer.

But in most of the books and other references, t=0.69RC is defined as a delay metric for RC circuits. For example in Rabaey's Digital VLSI degin book or http://homepages.cae.wisc.edu/~ece902/LectureNotes/Simulation_1up/lec3a.pdf or **broken link removed**. Of course there are other delay metrics such as 90% delay, or Elmore delay for transmission lines.

Also, there are also naturally observed (not with an active NIC) negative capacitances, especially in nanotube devices that can be realised today. For those properties these references can be given: **broken link removed**, http://www.nature.com/nphys/journal/v2/n10/abs/nphys412.html, **broken link removed**, etc...

So, I can further clarify my first question:

How can we calculate the 50% delay of a nanotube device that has the RC-equivalent shown in the figure?

Cheers,
carbon9

 

[LvW]

can capacitance be negative

Hi carbon9,

thank you for the interesting links to the papers about nanotube devices.
Until now, I never have heard about their specific properties regarding neg. capacitance effects.
But my first impression is: Nanotube devices behave as they would have something inside which reacts like a negative capacitance (in conjunction with other effects) - and therefore one tries to model the behaviour using -C.
Thus, there was a misundestandiung between us, as I thought in your 1st mail you have been talking about a lumped element -C within the region of electronics.
Unfortunately, I know nothing about nanotubes and cannot further contribute to the discussion.
Regards

 

[FvM]

what is negative capacitance

Apart from possible nanotubes properties, you should consider this:

In models or equivalent circuits, you sometimes get negative values for circuit elements. As LvW mentioned, they are virtual, not having all attributes of a physical part. It's obvious to me, that e. g. a negative resistance can't actually source energy (without a supply) and a negative capacitance can't provide a negative delay. You should never ignore the limited validity of models.

 

[LvW]

rc circuit with negative source

Hi carbon9,

one further information from my side:
A simple RC element with a neg. C - using an opamp as NIC - results in an active circuit which is known as a relaxation oscillator (astable multivibrator). This explains the fact that a neg. C acts as a source rather than as a passive part. It´s a quite interesting relationship.

 

[carbon9]

negative capacitance model

Thanks for the answers. But I think, from a circuit theory point of view we can derive an expression for the delay of the circuit in the figure without deeping into the discussion of -C is meaningful or not.

 

[FvM]

simple model for negative capacitance

If you can explain, which property of the said tunnel diode circuit looks like a negative delay, I'll agree. I've been under the impresion, that you concluded the existence of a negative delay from a negative capacitance value used in a model, which involves an opposite way of conclusion to my opinion.

 

[LvW]

model for negative-capacitance

Thanks for the answers. But I think, from a circuit theory point of view we can derive an expression for the delay of the circuit in the figure without deeping into the discussion of -C is meaningful or not.

Hi carbon9,

perhaps I´ve expressed myself not clear enough.
I like to repeat: With reference to your simple RC model - the combination of an R with a neg. cap (built with an NIC) results in an active circuit which performs selfsustained periodic squarewaves. Therefore, there is no "delay" of the step response which could be simulated.

 

[carbon9]

50% delay 0.69rc

Hi,

Now, it is clear, thank you very much.

Cheers

 

[Ruritania]

Interesting discussion, but this is still not clear to me.

Let's say we have a REAL capacitor (Cr) in parallel with the -C as illustrated in the post #1, and Cr>|-C|.

Then what's the delay? shouldn't be R*(Cr-C)? (remember we use the -C to cancel out (or neutralize) the real capacitance in real circuits, for example, in VCO designs)

Any further thought?

Thanks,
Ruri