Need help with LM5085

Anyone had any experience with this buck converter?
I have serious problems with it and all the online tools at national.com are only confusing/contradicting one another.

Please help, I lost a lot of hair with this project

Pls describe your problem in details. Pls use component value as datasheet recommended.Of course, PCB layout should follow guidelines.

I will try to keep the story as short as possible.

Some time ago we needed for a certain application a step down converter with 12V output from an automotive 24V system. I used many times in the past the National's online design tool, the WEBENCH.

Entering the parameters resulted in the following design:

**broken link removed**

We made for it this MCPCB board:

**broken link removed**

For some reason, the WEBENCH selects by default a 500kHz clock, resulting in Rt=95.3K, Rfb1 and 2 calculated to be 10K and 84.5K and Rsen 10mΩ

As we assembled the board, we were unable to keep the output stable above 22V, it was decreasing. Also we noted a very high sensibility of the output as a result of the high values of the Rfb resistors (the data sheet recommends to keep them in the 1-20K range).

A satisfactory output was obtained only when the clock was slightly decreased using a 110K for Rt and lower values for the Rfb resistors.

Based on this board we built another one, this time the same input parameters (Vin 15-40, nominal 24) but output needed was 9V@2.5A.

WEBENCH gave more or less the same Rt and Rsen, with Rfb and Radj changed according to the new parameters but still high and not according to the data sheet.

The board was also MCPCB and it contained basically a battery backup system where the step down powers an LED lamp and a linear battery charger followed by a step-up all controlled by a small PIC.

The step down circuit is marked within the red lines

**broken link removed**

This time the setup gave us serious trouble, nothing worked as expected.
Not to mention all the experiments, we managed to get a reasonable result only by doing the following:

Reducing clock to 150kHz, Rt 360K !!!
Changing the Rsen to 5mΩ
Changing the Rfb resistors to 10-20K range

The decision to change the Rsen to a lower value was after we tested an alternative MOSFET. National loves the si7465 for this application and we used it on the first board. While experimenting we installed a lower Rds(on) type and everything worked. So the next step was to reduce the Rsen to an unreasonable value (it will never develop the required 50mV at this current), but it worked and well, with the original si7465.

Then we made a third board, same input and 15V@1.5A output.

**broken link removed**

This time, based on the previous experience we installed the 360K Rt and 5mΩ Rsen with other components recalculated for the new parameters and it worked well and stable.

For some time we experience weird behaviour of circuits assembled on MCPCB.
Although they are supposed to provide better cooling and EMI reduction, we found many times that MOSFETs for example "don't like" the metal substrate.

This is a serious subject for another thread I suppose.

Another thing we suspected are 0Ω resistors we need to use as jumpers and relatively long tracks all a result of the single sided limitation of these boards.

With our new project and based on the results of the first 3, where we realized that the step down heating is not very high, we decided to make it on a regular FR4 PCB.

This time we needed both 9V and 15V outputs so 2 circuits were included.

Here is the board layout:

**broken link removed**

This time .... how to say this gently.... nothing, but nothing worked.
The board was carefully designed following all the recommendations and the bottom layer is ground plane.
None of the previous games with parts helped this time, nothing works.

So, I found while searching the web an EXCEL calculation sheet for the LM5085 series at National's web site.

This calculator at least gives Rfb in the right range and I tested the other calculations by manually calculating and comparing the different parameters from the data sheet formulas.

All seems right, except for one thing:
It will always put a 5mΩ value for the Rsen, which in our case it can not work.
I believe this is a bug but the formulas are protected so it is impossible to change it. What happens is that if we try to put 10mΩ as a standard value suggested by the data sheet it will give an eror. For both circuits only values above 18mΩ are accepted - which is right, at 20mΩ standard value we do get above 50mV as required. If I try to put back the 5mΩ as originally calculated it will reject it. Almost for sure this is a bug.

Placing a 20mΩ on the board brings some life into the circuit, but far from the required output parameters.

Several strange things happened while experimenting with the board.
I should mention that we tested different types of output and input capacitors, inductors and so on.
The current sense resistors we used were metal foil type as they give 1W in 1206 size. I had a thought they may cause some sort of EMI interference so I tested a carbon type. As what I had in hand was a 2010 size, I used about 10mm of wire wrap wire to install it.

WORKS !!! And stable too.

Then I installed the original 1206 but with the wire and works too, not only this, it works well with 5mΩ and 10mΩ and no matter at which side of the resistor I place the wire.

By the way, on the last board the Rsen is R10 and R17 and the setup is the same as on the older boards.

So the problem is not the resistor's value, after all 10mm of AWG30 wire has little effect (less than 3mΩ) and the circuit works with 5 and 10mΩ resistors.

I did tested another MOSFET with very low Rds, about 8mΩ instead the 64mΩ of the recommended si7465 and the circuit works well (without the wire). The new MOSFET is not practical as it has 30V limit which is not enough for our application.

I tested also the gate charge Qg factor using other MOSFETs with higher Rds and lower or higher Qg. None of them worked, the only thing that affects the LM's operation is the Rds.

I am expecting to get tomorrow some si7461, with 14mΩ Rds for testing.
It is quite a task to find a PowerPAK P channel and the si7461 looks like the only possibility other than redesigning the PCB to adopt a DPak.

I mentioned weird things?
Today, I installed by mistake a very small value Vcc capacitor. The recommended value is 0.47-1uF and by mistake I installed a 2.7n.
Can't understand why, but the circuit started to work over the entire input range with a stability never obtained before.

But when I duplicated the unexpected "success" to the lower part of the PCB, almost a copy of the upper section, it is not working.

I guess that except for a serious PCB layout problem nothing is logical any more.

This is the "short" story, in hope someone will be patient enough to read it I will really appreciate any opinion.

Hi.., as they say.

Been looking at this and appreciate the 'short story. It's the sort of short story I like because it includes that rare thing called 'information'. Very much appreciated.

I may/should/will add later.

For the moment, concerning your PCB layouts. Now I know this might not be realisable given other constraints but if I were to draw a circuit diagram which 'suggests' how the PCB might/should be laid out then this would, perhaps, be the result,



In some respects the 'star' connections, particularly for VCC, is something you have already done as limited by how surface mount components work out when you put them on a PCB and are 'forced' to route them. VCC, apart from the current limiting components may not be 'critical' and otherwise they do end up with what should be tight connections.

Why oh why oh why....

I'm having a moan about the way things get connected to the Mosfet. Assuming most/all surface mount Mosfets have that Pin connection then it would have been 'nice' if National would have swapped over PGT and ISEN on the IC. Grumble Grumble.

As suggested I have included RG as a 'Jumper'. Without reading the data/dirty sheet harder then I might not be sure if it is needed for a particular purpose other than that suggested. It's a 'Jumper'.

Whilst the VCC connections might not be so 'critical' and seem to work out as shown anyway the feedback and IC ground connections are. That's where your 'low level signal' stuff lives.

Looking at some of your PCB designs then it seems that you have treated the IC ground pin as 'Power Nirvana' and that includes shunting the catch diode current into it.

It is 'Low level Signal Nirvana' so you need to arrange things so it does not 'see' or get disturbed by that current. That's why I have the output filter connected as shown. Unfortunately it means I have to provide a ground 'Jumper'..

Apart from the feedback having to be passed under that 0R link you will have to ensure that the IC ground and feedback signal are routed 'away' from or outside of the output filter components. In particular make sure they do not pass under the filter inductor.

As suggested I realise it might not fit in with other constraints but I would recommend you compromise on those to achieve a 'working' layout for the circuit itself.

I won't claim it is 100% but I think it is close.

Elsewhere I have been reading the data/dirty sheet and you/I should be able to implement a 'method' that avoids WebBench. I have to sign up with contact details to some broken thing that uses 'Flash' so some sales rep can badger me? I think not!

Genome.

To be continued..

Genomerics said:

Elsewhere I have been reading the data/dirty sheet and you/I should be able to implement a 'method' that avoids WebBench. I have to sign up with contact details to some broken thing that uses 'Flash' so some sales rep can badger me? I think not!

Click to expand...

I think you are being a bit paranoid there. I have been using WebBench for years and have never been contacted by National Semiconductor.

Anyway, to the problem.

I have not used the LM5085 but have did have a few problems with a high current LM3478 based regulator a few years ago. Some of those problems were that WebBench is a bit crude and comes up with circuits that simply don't work. With the LM3478, which can work up to 1MHz, WebBench will suggest a design at 1MHz but the internal error amplifier is not fast enough. My solution was to drop the frequency considerably and increase the inductance. Also, their suggested slope compensation ramp seems to prevent things working properly - a simple, direct connection seemed to work best.

It is difficult to decide where the problem is with your circuit/board but I think you need to pick a circuit/board and work on it until it works rather than changing to another layout. You have some potential problems due to the tracking widths, for example, but even those can be modified on a prototype PCB with either copper tape or braid to see if that is the problem. Your single sided boards in particular seem to have rather narrow tracks for the current they need to carry, assuming you are using standard 0.5oz copper. They are fine for continuous currents but for switching regulators you are concerned about very small voltage drops in the current sense circuitry and also the inductance of the tracks. All my high current tracks were 5mm wide where I could fit them in, and I doubled them up on the other side of the PCB.

Your double sided PCB is better in that respect but C8 ground is a long way from D2, for example.

Star connections are important, as already stated, as well as understanding where the current is flowing.

I didn't notice what inductance you are using, but in my circuit I increased the inductance from 1uH (the value in WebBench) to 10uH as well as dropping the operating frequency.

So, no magic answer, but I think you need to stick with one PCB and experiment until you fix it. While the PCB layout may be part of the problem, I doubt it is the main cause and most changes can be made on a prototype PCB.

Keith.

Hi Genome and thanks for the reply.

Let's start from the end:

Genomerics said:

I have to sign up with contact details to some broken thing that uses 'Flash' so some sales rep can badger me? I think not!

Click to expand...

I agree, in National's case I got a single call from Future Electronics after I registered on their web site. But there are many advantages as I will describe below.
Know what? I prefer to officially register knowing someone might call rather something barely legal that happened with another manufacturer - I checked a step-up IC from TI, whre the recommended inductor was from Wurth Electronics.
There was a mistake with the p/n so I only entered Wurth's website, no registration, no nothing - the next day I got a call from their local representant.
This is spyware, not just a plain cookie.

Back to our story:

About the "low level signal nirvana" I assume you mean pin 4 of the IC.
Because of layout constraints, if you look at the first 3 PCB, all Metal Core single sided of course, I had to use a jumper 0ohm resistor to pass the GND to the exposed pad, somehow just as you suggested.
Pin #4 was connected separately with the only drawback being the feedback track passing under the jumper.
These 3 MCPCB eventually worked, based on the latest information I got from National as I will describe I don't know why/how they work, but they do.

When making the FR board I tried to keep it close to the recommended design and got some ideas from their Demo Board.

**broken link removed**

Take a look at the IC's ground connections inside the yellow circle, pin 4 is directly connected to the exposed pad and both to the bottom layer ground plane through the tiny vias on the exposed pad.

I did the same, with the addition of a larger via just next to the IC.

About the jumper 0 ohm resistor, I don't like to use them on power tracks.
If you'll look at their data sheets you will see that they are not perfectly 0, so I never know what problems they might cause.

I mentioned in my first post that I used the excel calculation sheet available on National's website
**broken link removed**
and found a bug with the Rsen value which is always set at 5mohm which is not correct.

I filed a question to their technical support and surprise surprise !!!
Got the next day an email from a very cooperative engineer which already sent me a better excel sheet with better calculations and unlocked.

I am right now testing the board with the new values.

They also took a look at the PCB (the last one in my post).
There is something wrong with the input capacitors being located too far from the MOSFET/Diode node.
I am not sure they can cause such a severe, up to totally dead circuit, but there is something in this comment.

I will post the results of the testing soon, and I wait for the promissed continuation of your post.

---------- Post added at 13:36 ---------- Previous post was at 13:34 ----------

Hi Keith,

The first 3 boards are in use and work, sorry if I created the impression that the 4 PCB are redesigns.

As I mentioned, the default clock used for many calculations including the online tools is 500kHz.
The LM5085 is capable to work between 100kHz to 1M.

We also got the first 3 boards to work by lowering the clock to 150kHz, same as your experience.

We got good results using lower Rds ON MOSFETS, but exactly as they described in the data sheet, P channel MOSFETS have a tradeoff between Rds and Qg/speed, the lower the Rds is the Qg is higher resulting in increased IC heat.

As we need max. input of 40V (it is used in an automotive 24V systems and the transient stripper/clamping circuit we use is designed to clamp to 38V) the MOSFET options are quite limited.
I found a SI7461 with 14mohm Rds and Qg 190nC. The standard mosfet recommended by National is SI7465, with 64mohm Rds and 40nC Qg.

Entering these values in the excel calculation sheet gives a toasted IC.
While at 500kHz clock with their SI7465 the junction temp. increases by approx. 45deg C, with the SI7461 this value goes to 184 deg !!!
In order to bring it to normal temperature the clock should be set to minimum, 100kHz, resulting in larger inductors and huge values for the in/out capacitors.

Quite a catch !

You asked about the inductors we used, we tested between 10-47uH while the calculated values are 22uH.

As I said and totally agree with your opinion, we experimented with the first 3 boards and solved the problems, lowering the clock, reducing Rsen and bringing the feedback resistors to the data sheet recommended range.

Basically the third board worked with no problems.

I posted my question as the last board is simply not working at all and most of the things that helped with the other ones are not helping in this case.

Cough... Yes Keith. I'm afraid I am slightly paranoid

Hi Emmr, back again.

I see your point about the way you have connected the 'power pad' to the 'gnd' pin. What I might suggest is that may not be the ideal way to do it. Whilst the data sheet says 'exposed pad on bottom connect to ground' I believe they are expecting that ground will be a plane to aid with thermal dissipation.

I could be wrong but I would not be surprised if the pad itself was in fact the IC substrate rather that being a true internal ground and you may find that if you measure between it and the ground pin (4) then there is not a 'true' connection. Once again I could be wrong.

Elsewhere in the data sheet it..

**broken link removed**

Page 3) it says,

4 GND Circuit Ground Ground reference for all internal circuitry

Click to expand...

Reading through the rest there is no specific mention as to how the 'power pad' might be connected to that pin other than to say it should be connected to 'ground'.

My interpretation would be that as suggested pin 4 is the "low level signal nirvana", I was not allowed to use another word, and as such should be referenced separately from other high current traces and that 'power pad' to the bottom of your output filter capacitor.

Possibly stretching things but it may also be the case that if the 'power pad' is on the substrate then it might act to couple switching noise from the high side driver in the circuit into that low level point if you do make such a connection.

I hope some of that sounds realistic.. I need to go and do some shopping. Back in a mo.

Genome.

Back again.

I take your point about 0R resistors not really being 0R, unless you can source 'better' devices. It was and is for the moment the 'best' way I could think of making the connection whilst maintaining feedback integrity if the board had to be single sided.

Picture Server seems to be down.

Just had another thought and you would avoid this problem, if it does exist, with a direct connection of the 'power pad' to pin 4) although as I am suggesting it might not be ideal.. If the 'power pad' is connected to the IC substrate and there is no 'deliberate and real' isolation then, past memory from Unitrode notes, the isolation as such might be via substrate diodes.

I hope this does not sound too surreal. The problem indicated was that if voltage between the relative nodes was sufficient then those substrate diodes would become forward biased and upset internal operating levels. It might have been the UC3825, just to show my age. Perhaps something else to worry about but I would expect that, other than transients.... hmmm, more thought required on that one.

Mumble ping 100% packet loss.

Know what? I prefer to officially register knowing someone might call rather something barely legal that happened with another manufacturer - I checked a step-up IC from TI, whre the recommended inductor was from Wurth Electronics.

There was a mistake with the p/n so I only entered Wurth's website, no registration, no nothing - the next day I got a call from their local representant.

This is spyware, not just a plain cookie.

Click to expand...

Tinfoil hats on ;-) No, seriously. There has been recent controversy over the use of Flash LSO, Locally Stored Object, 'Super Cookies' being used to track peoples activity across websites. Still, that's slightly off topic for the board and thread but I would not be surprised if the companies concerned did manage to link to you via such methods. If they did so then it would have been likely to be in violation of their privacy policies... or perhaps you did not read the small print buried elsewhere and un-tick the relevant check box.

OK, Picture Server still down. I'll go ImageShack.

Referring to the current limit section. I was slightly confused with the way it was connected and its reference to the use of CADJ for 'filtering'. I'm used to seeing something different but that would not apply in this case. Then again it might.

**broken link removed**

Meh! That blows things out. Anyway when they refer to filtering and 'noise' what they are talking about is setting the 'reference level' to the current limit comparator. It has nothing to do with 'noise' on the current limit signal itself.

That might be a result of the gate drive signal coupling through Cgs into the sense resistor or inductance in that resistor or the layout. I have to say I might be talking about 'ideals' with respect to the layout but realise that they may not be realisable.

I do understand that the IC incorporates 100nS worth of 'Leading Edge Blanking', LEB, on that signal but it may, for whatever reason be insufficient. Perhaps the layout or parasitics in general produce ringing on the ISEN pin and that will still result in premature triggering of the current limit comparator.

What I would suggest is,

**broken link removed**

The top one is as per the data sheet. The bottom one includes additional filtering from the current sense point itself using RF and CF. That is 'standard' practice in other circuits although the LEB is meant to obviate the need for it.

Unfortunately if your components or layout are such that they introduce 'nasties' for longer than the time that LEB is operational then you might have to resort to implementation of such filtering. As a 'just in case' it would be useful to have the opportunity to include it on the PCB as a first run.

Wet finger in the air 1K/100p or 100R/100p.

I would have kittens over implementing the circuit where it is relying on the Mosfet On Resistance. That would take a harder person than me and they would probably have less hair than you when they finally gave up...


I shall babble in a bit about how I might design the circuit based on the data sheet rather than WebBench.

Genome.

Edit

Oh, I should mention I went back and had a look at the 'evaluation board' and they have taken or do have the luxury of a very solid ground plane on both sides of the board. Always something good to have unless you are restricted in some other way.

Hmmm... interesting idea, maybe I will test it.


I will never use the current sensing based on the Rds too, also the data sheet is perfectly explaining how this impedance changes among other facors with heat, practically I don't know why they mention this option at all.

Today I tested the circuit with a new calculation for the Rsen, far from the 10mohm default of the WEBENCH or the 5mohm calculated by the excel calculator.

They sent me an improved excel which makes the right calculation and points to 25mohm.

NADA

What happens is we get a "window" where if we need 8.8V at the output we get 8.5-8.6 when the input is lower than 21V or higher than 29V and in between it drops to 7.3V.

We used the excel for the other circuit with 15V output, here the situation is even worse, not working at all.

We even assembled a new board with hand picked and double checked components - nothing, same result for both.

I even took the input capacitor and placed it directly on the diode's pad and soldered the input ground to this point.

Their suggested 500kHz clock was also reduced to 300 and later to 150kHz, with the inductor and other components recalculated, same result - but hey, at least the circuit is stable with it's behaviour, the voltage drop on the first one and nothing on the other.

Playing with such a wide clock range was supposed to show if any interference is causing the problem, but it looks like if there is some it won't interfere that much.
==========================================================

There is one thing I still don't understand, they claim the MOSFET's Rds is not important.

But I tested the circuit with a low Rds type and it works, the problem is then the temperature management.

It also makes some logic, as the switching current passes the Rsen, Rds, Inductor's DCR and output capacitor's ESR.

When we used the 5 or 10 mohm Rsen, lowering the Rds increases current, which increases the voltage on Rsen and perhaps brings it to the required 50mV minimum.

Here is what they responded when I asked about this:

Regarding the different PFETs: if the circuit uses a discrete current sense resistor, then the Rdson of the PFET doesnt matter. Using a discrete current sense resistor is always better in terms of noise rejection and performance because that resistance is stable over temperature. However, a PFET with a big gate charge (say over 40-50 nC) could cause problems by slowing the rise and fall times. If the rise time is too slow, the current limit circuitry can get confused.

I think it doesn't matter for the current limit OpAmp, but does makes something if the circuit works. There is no place to include the Rds in the calculations, unless the unpractical Rds as Rsen option is used.

So.... I lost more hair today, the circuit is still not working and I delayed with all the experiments the SI7461 MOSFET test which I know almost for sure it will work - for how long I don't know as according to the data sheet the junction temp. is supposed to be high enough to burn a well done hamburger on it.

This whole situation is stupid, I feel like I am tested if all Murphy's laws are implemented with this project.

Regarding your stabilizing circuit, the values used for the Rsen and Radj are 25mohm/2.94K for one circuit and 50mohm/4.42K on the other.

Perhaps this will help with your calculations for the resistor/capacitor.

And.... thanks

As an aside

Regarding the different PFETs: if the circuit uses a discrete current sense resistor, then the Rdson of the PFET doesnt matter. Using a discrete current sense resistor is always better in terms of noise rejection and performance because that resistance is stable over temperature. However, a PFET with a big gate charge (say over 40-50 nC) could cause problems by slowing the rise and fall times. If the rise time is too slow, the current limit circuitry can get confused.

Click to expand...

Is not necessarily 'telling' but you might see the reasoning behind it in terms of the 100nS Leading Edge Blanking.. Goes to hunt for 'any old' Mosfet data sheet... Here you go,

https://www.vishay.com/docs/91070/91070.pdf

**broken link removed**

Not your Mosfet but you will probably have a similar graph on its data sheet along with the same referenced test circuit. I should hit myself for not getting the one you will be using.. Anyway, in words,

The first section is the driver charging Cgs, gate-source capacitance, up to the turn on threshold of the device, Vth. When it hits that the device starts to turn on and discharge its Cdg, drain-gate capacitance, that 'fights' the drive current resulting in the 'plateau', probably best known as 'Miller' effect. Once the device has turned on then the gate voltage rises again.

The relative slopes are affected by voltage across the device. Junction capacitances vary over a wide range depending on the voltages across them. You should have graphs for those on the data sheet as well. They will be quoted as Ciss, Crss and Coss along with some sums so you can work out relative values.

Going back on track then the above quote is, in effect, a loose statement that if you have a Mosfet with a large gate charge and, given the driver is in some respects current limited then it may not be able to switch the device on before the LEB period is over. If that is the case and the device switches afterwards then the ISEN signal will be subjected to the 'spikes' LEB was attempting to ignore.

As they say,

the current limit circuitry can get confused

Click to expand...

Unfortunately that description does not fit with your experience because the lower RDSon device, presumably with a higher gate charge, works whereas you might have expected it to make the problem worse.

I do not think it is the RDSon of the device in play here. It is the fact that it has higher terminal capacitances or Gate Charge and as a result will switch more slowly.

Ignoring parasitic inductance or some sort of resonant thing what disturbs the current sense signal during turn on is the gate drive itself and then reverse recovery of the catch diode and its capacitance and other strays in that region being charged. Cds does not affect this, it is shorted within the Mosfet itself.

If you slow the rise times then you reduce the peak currents experienced and get less of a spike at turn on so you are less likely to upset the current sensing. In part, and it is not a 'science', this is one of the purposes of including a resistor in series between the driver and the Mosfet gate. It limits switching or rise times, and causes dissipation trade-offs elsewhere.

One of those is that rather than the IC having to dissipate the energy associated with charging and discharging the Mosfet Gate is that the Gate resistor can take over some of that burden. WebBench is giving you 'nasty figures' a gate resistor would or might help.

Sorry for the long Ramble but I hope that in some respects it makes sense in itself and with respect to what you are seeing in practice.

So, I'm out of date, on this surface mount stuff.. and you will have to adjust to suit but, wet finger in the air again, let's say your current sense resistor is rated at 200mW so you will end up driving it to 100mW.

Take your nominal input voltage and required output voltage. I'll pick 24V in and 12V out. That gives you a duty cycle for a buck converter of VOUT/VIN or 0.5 which will be the duty cycle of the current waveform applied to the resistor.

Somewhere there must be a sum that tells you what the equivalent RMS value would be.. Just a moment

**broken link removed**

Aha!! Terry Given on Usenet robbed by WEB2.0

JMini wrote:
> Does anyone have a way to approximate and RMS voltage from a PWM signal.
> I want to regulate the RMS voltage sent to a lightbulb, but do not have the
> room for the inductor and capacitor required to carry 20+ amps of current. I
> need to feedback a voltage to the PWM controller that is proportional to the
> RMS voltage of the output. I don't need an EXACT RMS conversion, rather a
> ratio would be fine since I can adjust the actual voltage fed back to the PWM
> controller via a resistor divider. For this current design, it will be
> operating at about 40kHz.

square-wave, duty cycle D = Ton/Toff

RMS = peak*sqrt(D)

Cheers
Terry

Click to expand...

So that will be,

Irms = Iout*sqrt[VOUT/VIN]

I'll say your output current is 2A so given 24V in and 12V out I get

Irms = 2*sqrt[12/24] or 1.414A

Having decided to limit the power dissipation in the current sense resistor to 100mW, which would be Irms^2*R, I get to calculate a value of 50mR.

If I have used similar figures to those you have yourself then perhaps WebBench is giving the 'right' answers. All I might be able to claim is you may now know what the relevant sums might be where they come from and how you might fudge them to suit.

Onwards.

'Rule of Thumb, as opposed to wet finger, Says' you select the value of the output inductor to give a peak to peak ripple current of 20% of the expected output current. In this case that is 0.4Amps. When your load drops below 0.2Amps you will enter 'discontinuous' operation and the application note indicates that the operating frequency will change under those conditions.

Peak switch current, ignoring transients, will be 2Amps + 200mA... but your load may well, short term, demand more than this under certain 'unknown' circumstances. It's another thing to consider. For the moment I'll just say 2Amps + 200mA for 2.2A and add another 20% and get 2.64A which will be my current limit level and 132mV across the 50mR sense resistor.

I really hate doing this. It's easy from my end to wave, almost arbitrary, sums about the place. Someone else gets to suffer.

Anyway. From the data sheet with the 40uA bias current that makes RADJ 3K3. Again, that may or may not fit in with what WebBench is 'telling' you, but it seems to, but if you know the sums....

Now I need a value for CADJ. I do not think that can be 'reasonably'. characterised beyond...

It is there for filtering of the 'reference level' for that particular comparator.

More, within limits, may be good. I'd be 'inclined', for no particular reason, to set the RADJ/CADJ 'pole' at one fifth of the reciprocal of the soft start time, Tsfst 2.5mS. That will be 2KHz.

CADJ = Tsfst/5.2.pi.RADJ

Which gives me CADJ as 24nf and I would pick 22nF

I really have no way of 'justifying' that choice or the explanation of it beyond 'More is "Good"' and it would have to fit in with the soft start time of the IC.

I can feel my hair falling out as a result of that one.

Time for a 'brane brake'

Later

Genome.

Just wanted to keep you informed.

We assembled a board from scratch with the 2 step downs, according to National's instructions.
As described before, one of them is working with a voltage drop in a certain window within the required input range while the other not working at all.

I wasn't able to test the sense opamp stabilizer that you sugessted, probably I will do this next week.
I did tested the SI7461 which at least brought into the completely dead circuit some life.

Meanwhile I got a reply from National's support.

Now they say that there is supposed to be a 1nF capacitor in parallel with the Rsen.
I looked (again) on all the datasheets, application notes, demo board - there is no such capacitor and not even mentioned as a note.
I do hope they don't make a mistake, maybe they are talking about the 1n cap. in parallel with the Radj, but this one is there.

Anyway, this suggestion somehow resembles your idea, except for the small resistor you added between SRC and IC.
Maybe it worth's trying this.

The second idea is to take out all the ripple extractor circuit, assembled with an RC in parallel with the inductor and a capacitor from between them to ground.
This circuit is supposed to extract a 25mV ripple from the output which feeds the feedback input.

As I use a tantalum output capacitor which has high ESR compared to ceramic or electrolytic, there might be a possibility that the ripple is already high enough and these components not needed.

What I know is that much before that we tested the circuit with ceramic and electrolytic output caps, and the ripple extractor was at least in one experiment changed to the #2 setup in their data sheet, where only a single capacitor is in parallel with the upper feedback resistor.

Looks like the end of the ideas, I will test your setup next wek, I guess this is the only thing not experimented yet.

Otherwise I guess I will have to try a completely different approach, find another step down and move on.

Sometimes when a hobby becomes a profession you stop enjoying it.
In earlier times I would sit and find where the problem is, but here I am working on a project with tight time schedule, I can not loose another week on it.

I am loosing confidence in these new IC's, technology advances at the cost of too many sensitive factors in a relatively simple setup.
I feel like I am designing an old tuner and not a simple step down switch. Every PCB track, component location and etc. makes the difference between a dead circuit and one that is not working 100%.
I have to think about future production, what if a slight change of some tiny capacitance, ESR, inductance and a million other factors occurs between purchased batches of components?
After all every component has tolerances, some components huge tolerances, for example capacitors and inductors.

It reminds me in the good old days where if we were using a TTL or CMOS oscillator with schmidt trigger input or MMV's, we were getting different period/frequencies if the prototype was assembled for example using a TI part and the other with Motorola.

I don't know if I mentioned that, but this is the second time I have problems with National, a few months ago I had and even more severe incident with a high power step down, the LM3434 which is a version of LM3433 capable of working at increased voltage range, supposed to be up to 30V.

The prototype worked, until the input reached about 20V and then smoke came out of it.

I purchase their demo board for testing, again believing we make some mistakes - a $200 board.
Needless to mention it was operated much below the maximum, absolutely within the working range.

The demo smoked even below 20V, at about 18V.

So... ???

So I found a Linear compatible part, brought a demo board from them too, works like a doll, much smaller inductor, less heat and above all some hair kept on the head, at least until the LM5085 came into my life.

Maybe if I'll look at Linear and find a working part I will invent a possible cure for premature balding within the electronic engineers population - make a start-up company and perhaps will become a millionare.

I guess that right now desperation is what makes me write these things.

Apologies for not coming back earlier. I'm going to spend some more time on this today and get back to you later. In the meantime given the circuit is 'temperamental', to say the least, and in some cases misbehaves as you vary the input voltage then that does tend to indicate noise problems, perhaps as a result of circuit board layout issues. As you say National's suggestion that you parallel the sense resistor with a 1n capacitor is 'similar' to the RC filter I have suggested and comparatively speaking slightly 'dumb' but maybe they are looking for a 'quick and dirty' fix. I would use the RC and also consider including a gate resistor. OK it's board 'hacks' but you might get some pleasure from taking a scalpel to it. :twisted:

As I say I'll look at things and get back to you.

Genome

OK, story so far. Sorry if some of this is a repeat.

I've suggested how you might select a value off your current sense resistor and the operating waveforms that it will see in terms of current and how that relates to its RMS power dissipation versus its rated dissipation. Reading back I note you mention a 1206 1W rated resistor whereas I picked a 200mW device. You do have to de-rate but your 1W device will give you the opportunity to increase the level of the current sense signal. In terms of 'noise' its good to increase the level of that signal and you know how to adjust RADJ on the basis of the internal 40uA sink.

As I say that part of the circuit is setting up a reference level and you need that to be 'clean'. Again in terms of the value of CADJ more is better and rather than using the 'recommended' 1nF I would propose you set the RADJ/CADJ pole at 1/5th of the reciprocal of the soft start time of the IC.

The purpose of the 100nS Leading Edge Blanking is supposedly to avoid adding the suggested extra RC filter to the current sense signal, ISEN, itself and the 'cost' associated with those components. Big deal? Not if adding them solves a problem. You may find that 'something else' alleviates an apparent problem but it's nice to have the opportunity to put them in 'just in case'.

As to values. It is another thing that is not 'science'. Generally C is chosen as 100p and then R adjusted. Given the LEB is set to 100nS you might guess at a 2.2RC time constant of the same value. That would make R something like 470R but here a smaller value would be 'nicer'. One other thing it will do is that should you have parasitic ringing on that particular node then it will filter it as well.

In some, all[?], respects fast current limiting is desirable but it is not necessarily the be all and end all. I'm going to have to read that part of the data sheet over again to see how the IC responds. Otherwise, depending on the circuit implementation, when in limit as long as your filter inductor does not enter saturation, and sometimes even if it does, then things will not be killed.

Next up is a gate resistor. It does two/three things. Firstly it will redistribute power dissipation from the IC into itself. Next it slows switching times. In doing so it will worsen dissipation in the Mosfet although, it is analogue and evil, there will be a reduction in that associated with the catch diode reverse recovery time and its capacitance. Otherwise slower switching times mean less noise.

It is difficult to characterise what the IC driver itself is doing. There is an indicated +1.75A/-1.5A peak available current and otherwise a suggestion of an 'internal' 2R3 impedance, mention of standing 500mA drive. That will be due to the devices used in the IC.

SI7461 https://www.vishay.com//docs/72567/si7461dp.pdf
SI7465 https://www.vishay.com//docs/73113/73113.pdf

The 'Spice' models do not help much,


Which is, more or less, standard practice for Mosfet models in general. Otherwise you move back to the data sheets and look at Ciss, Crss and Coss for a 'guess'.

7465



7461



This might fit in with some of the 'results' you have been seeing.

I did tested the SI7461 which at least brought into the completely dead circuit some life.

Click to expand...

That might be telling in that the SI7461 is the lower RDSon Device and has higher terminal capacitances which will slow down switching speeds.. In the same way that a gate resistor would do so as well for the 'higher' RDSon device.

Today, I installed by mistake a very small value Vcc capacitor. The recommended value is 0.47-1uF and by mistake I installed a 2.7n. Can't understand why, but the circuit started to work over the entire input range with a stability never obtained before.

Click to expand...

That might be another thing that would limit switching times. From the data sheet,

CVCC: The capacitor at the VCC pin (from VIN to VCC) provides not only noise filtering and stability for the VCC regulator, but also provides the surge current for the PFET gate drive.

Click to expand...

'If you have no 'surge current' you will not have 'fast' switching times.'

You have noted that the excel spreadsheet that the IC gets to suffer as a result and a limitation as to which devices might be available for your particular application. It might be worth looking into that as well. Just on the basis of RDSon it seems that the devices you are using are more than capable of doing the job and you might get away lower specced devices.

National might 'recommend' them because that is what they have got plugged into their spreadsheet. You are not forced to follow those guidelines. In my 2A example the 50mR sense resistor that resulted dissipated 100mW. Ignoring capacitances your 7465 would do the same.

I've 'digressed'. From the above graphs it is not explicitly stated but..

Ciss = Cgs + Cgd
Crss = Cgd
Coss = Cds + Cdg

So

Cgs = Ciss - Crss

Again the following is not 'exact' but you might choose the Ciss value at 'high' voltage, ignore Crss, and call that the Gate-Source capacitance. You charge and discharge it twice per switching cycle through the driver voltage. That requires an energy of CVdrv^2. Multiply by the switching frequency to get the 'power'.

7465 1nF 7.5V Fs 200KHz gives 11.25mW, 28.13mW @ 500KHz
7461 5.2nF 7.5V Fs 200KHz gives 58.5mW, 146.3mW @ 500KHz

These are not in themselves 'massive' figures and I would not be surprised if the spreadsheet itself is in some way taking 'cross-conduction' of the internal driver into account which will, perhaps, be the reason why it 'moans' about dissipation in the IC at high frequencies with larger capacitive loads on the driver output. It will be in its 'active' region, and suffering from cross-conduction, for longer as a result.

Enough, for now.

Next up will be some blather about setting the on-time and also that ripple voltage the thing requires to operate. Sometime today, my time. It's a date.

Oh yes... I'll mention I am very much in tune with the...

Sometimes when a hobby becomes a profession you stop enjoying it.
In earlier times I would sit and find where the problem is, but here I am working on a project with tight time schedule, I can not loose another week on it.

Click to expand...

Just when you have crawled over one brick wall you find some evil person has built another one behind it. Time schedules and 'management' do not help.

Hopefully there is a 'glimmer' of something in some of the above. As suggested I'll carry on later.

Genome.

Genome, you are great, I really appreciate your efforts

Emanuel

emmr said:

Genome, you are great, I really appreciate your efforts

Emanuel

Click to expand...

Thanks but don't do that.

I'll suffer from 'head not fitting through door' syndrome, or having to worry about it. Don't forget I am just waving hands in search of an explanation. The glove seems to fit at the moment.

Having 'promised' the rest. For tonight I am going to fail again.

Still, there is tomorrow morning and the the weekend.

Genome.

Back again.

Other than suggesting you stick with the recommended VCC decoupling capacitor of 1uF I don't think there is much left to be said about what is going on at the top end of the circuit so I'll move on to the bottom.

In my example I am looking for 12V out at 2A from the nominal 24V in. As the data sheet says and you have noted the suggestion is that the circuit needs a minimum ripple on the output to function correctly otherwise it will go into some messy 'hiccup' mode and probably does so anyway if you enter discontinuous inductor current operation...

With the switch on inductor current, and output voltage, ramps up. With the switch off the opposite happens. It's not so much 'hysteretic' control as 'self-oscillating' although the two are effectively the same. The 'fixed' on-time might be something that removes a degree of freedom from things making the operation unpredictable. It is one of the things that is making it hard for me to visualise how the circuit does operate at a fundamental level. This is one version of 'self-oscillating',



It relies on the gate delay, Td, in this case set to 500nS. I don't believe that is necessarily related to the mention of delays in the 7085. In this case the inverter is set so its input transition point sits at 0V. With the -2.5V reference and R1/R2 feedback components I expect an output voltage of 5V and,



That's what I get. The switching frequency is dependent on the delay and the Input and Output voltages. Starting with the switch off when the output voltage falls below 5V the gate would change state but there is that 500nS delay during which an 'error' is accumulated. You might say the inductor current falls below that required by some amount which would be,

dILa = Td.VOUT/L

When the switch turns on again the inductor current has to recover to its original level and the time it takes to do that will be,

Tra = dIla.L/(VIN - VOUT)
Tra = Td.VOUT/(VIN - VOUT)

Then there is another 500nS delay and overshoot,

dILb = Td.(VIN - VOUT)/L

and another recovery time,

Trb = dILb.L/VOUT
Trb = Td.(VIN - VOUT)/VOUT

The total period becomes

Tau = 2Td + Td.VOUT/(VIN - VOUT) + Td.(VIN - VOUT)/VOUT

For the circuit values given that is 2.667uS so Fs should be 375KHz,



The 'science' or sums work.

Does not help much with the 7085 and in this case as suggested the switching frequency, given VOUT is regulated, will vary with VIN. The 7085 supposedly avoids this by imposing a 'fixed' on time that varies with VIN and is otherwise not relying on 'delays' or 'hysteresis' as such.

In the above there is not really a concept of 'minimum' ripple. The important factor that ensures predictable operation at a predictable, although variable, switching frequency is that the 'loop' is overall first order at the switching frequency. That statement is not strictly 'true' it is really that the cumulative phase shift including that introduced by the gate delay is 180 degrees. That is guaranteed in the above by the L/RESR component in the output filter.

If I set RESR to 1p, effectively zero then I get,



The switching frequency has dropped to 30KHz :sad:

In order to return some semblance of 'normal' operation I have to do something like this.



V(n003) is the input to the gate. You'll see I have the 'triangle' ripple back again indicative of things going back to 'first order'. The switching frequency has however only recovered to 340KHz. I have to admit that my explanation of this may not be complete or indeed correct.

You might see there is some similarity between the above circuits and the various 'ripple' configurations being proposed for use in the 7085. Unfortunately I'm beginning to think that the 'fixed on time' effectively throws such 'nice' relationships' out of the window or it is at least complicating things in a way I don't fully understand. yet! :?

Back for more later.

Genome.

Sorry about this, I'm just thinking out loud

Interesting simulation, it very much shows your point and justifies the RC addition at the sensing opamp you first came out with a few days ago.

I've been trying to find a reason for that voltage drop "window" that I get, which is very strange. I could understand a certain input value from which the circuit will cause this drop, I mean above or below a certain input it works and drops (again) above or below that value - it could make more sense than what is happening.

So what is causing the circuit to work ok (more or less) from the minimum of 15V up to 22V, then drops up to 28V input and above 28V back to the same output as with the 15-22V?

I am testing it with a constant 2.4A load, so the load is constant.

The 5085 has 3 modes of operation, according to the datasheet, page 11:

CCM Continuous Conduction Mode for medium to heavy loads where the inductor current is always greater than 0 and the frequency is supposed to be constant with load/input variations.

DCM Discontinuous Conduction Mode for light loads where inductor current reaches 0 during Off_Time and the frequency is lower than in CCM and varies with load current.

The third mode is a direct mode, initiated when the input voltage is almost equal or less than the required output, here the MOSFET is held on continuously and Vout is almost equal to Vin.

I used their excel calculator (the good one the support sent me)

**broken link removed**

Where I checked that all the formulas are indeed according to the data sheet.

I was afraid that maybe I entered wrong operating parameters - Vin min/nom/max and Io max/min where minimum switches between CCM and DCM.

The values I entered are 15/24/40V and 2.5/0.85A with 8.8V at output.

Perhaps I should explain what the step down is used for:

It is supposed to work in an automotive 24V system. The input stage has a protection circuit composed of a clamping circuit set at 38V and a cut-off set at 15-15.5V. The step down powers 2 LED strings with a total of 0.7A, a battery charger controller which at top consumes 1.3A and a PIC with some A/D circuit, voltage reference and etc. all together some 50mA tops.

The charger works from time to time, same the LED strings.

So the load can be anywhere between (almost) 0 to about 2A, but as the charger is more or less constant when working (no trickle charge is used) then some clear steps are used, set in the excel as I mentioned at 0.85A for LEDs only and 2.5A if LEDs and charger are working. Now that I think of the other options, there can be also a situation where only the charger is working but not the LEDs, and the LEDs can be dimmed anywhere between 0-0.7A.

Maybe I wasn't supposed to create this step and "tell" the excel only the maximum current. Entering this results only in the inductor's value changing to a very low value of 3.3uH, instead 10uH calculated with the current stages.

Of course I rushed to try this, but no luck.

If I use a constant load which is supposed to keep the 5085 well within the CCM range, then what causes this Vout drop in a "window" right in the Vin's middle range - if the frequency is not changing?

Interesting simulation, it very much shows your point and justifies the RC addition at the sensing opamp you first came out with a few days ago.

Click to expand...

Not really. The RC was for the current limit comparator in order to deal with possible noise causing false triggering. The simulation demonstrates a 'self-oscillating' converter based on delays. Hysteretic does the same thing but the delay is introduced by that hysteresis, it takes time to move from the upper trigger point to the, new, lower trigger point and then back again the other way around which is effectively a delay. I think the 7085 with its 'fixed on time' throws the 'theory associated with those into the bin.

I don't know how much of a voltage change you are seeing on the output in this 'window' and I doubt that this would explain it, it sounds like you are experiencing something larger, but for a buck converter maximum inductor ripple current occurs at 50% duty cycle... I think. Either side it is less. I keep looking at it and thinking that the actual output voltage you get will will always be 'what you want plus 'half ripple' multiplied by what the feedback is doing...

Let's say you have a 12V output. That makes 9.6 times the reference. Pick 50mV ripple that has to appear at the feedback point.... This is not going to work... Anyway, that might represent an imposed error referred back to the output of 0.48V double that for the fun of it and there might be an opportunity for your output voltage to gain errors depending on other things.

That was a bit of a nasty explanation but is that anywhere close to what you might be seeing in terms of output voltage variations? It's the fact that, as far as I can see, the switching point is 1.25V and then the error has to return to that so the ripple sits on top of the required regulated voltage making it wrong and then maybe the spreadsheet guesses an adjustment for the required feedback components to make it right for one particular situation and it becomes wrong elsewhere..

That sounded convoluted.

I'm going to try and slap a Spice model together that will hopefully be more representative of what the 7085 is doing.

Catch you later

Genome.

I'm believe I'm beginning to lose some hair over this now. Would you believe my Spice models are being 'temperamental' as well?

One thing that arises is that as far as I can see, without taking other action, the circuit as described in the data sheet might suffer from a condition whereby it does not start up or at least not reliably.

Ignoring the mention of the soft start in the data sheet consider the one shot.

When you first apply power the IC will say 'Output Low better trigger the one shot'. If it does not continue to do that, or maintain the PFET on under control of the current limit, until it comes into regulation then it never will get into regulation. Effectively there will be one output pulse and then 'game over'.

Presumably National have some special hidden fruit that avoids such issues. You might imagine I am having problems finding one.

Hacks with LTSpice some more At Last!!. Something that appears to 'behave' itself.



Might not be 100% but,


Upper section is a basic buck converter. S1 would be your PFET. Other components 'as' along with the capacitor ESR. The bit that gives you the ripple.

S2 is the 'voltage regulation' comparator along with feedback components RF/RG. Vref is set to ramp to 1.25V in 2.5mS as per the data sheet. S3, R2, R4 and C1 make up a ramp generator. It's 'progammed' via VIN through R2 so the rise time and hence 'one shot' on time varies as required. It gets reset back to 100mV by the SR flip flop and S5...

S2 sets the flipflop turning on S3 and when the voltage across the capacitor drops to 100mV S5 resets the SR flip flop. Whilst the voltage across the capacitor is below 5V as set by V1 S4 provides a high drive signal to S1, the PFET. C1 and R2 are scaled for a 2.5uS 'one shot' time to acieve an operating frequency of 200KHz.

It is probably nothing like what National have actually implemented... In particular there is no real concept of 'minimum ripple' other than it does fall over if you do not have 'enough'.

Anyway, Coming into regulation with VIN at 24V



In regulation with VIN at 24V



Switching frequency is about 210KHz.

In regulation with VIN at 15V



Switching frequency is about 185KHz

In regulation with VIN at 40V



Switching frequency is about 216KHz

If I make the capacitor ESR 1 pico-ohm and therefore throw away the ripple then..



Things are broken.. I might assume the IC current limit would be active if this sort of thing was happening.

Startup into low load with discontinuous inductor current,



And in regulation,



As they suggest the switching frequency falls. In this case it is about 20KHz.

I would not be certain, and probably doubt, that what I have presented above is a true representation of what is inside the 7085. Perhaps you can ask National. Otherwise it seems to demonstrate some of the appropriate [mis]behaviour.

I do still think you are suffering from noise problems due to PCB layout but I don't doubt the IC might be particularly fidgety in that respect as well as its requirements for 'ripple'. The presented circuit will not show 'noise' issues but it might be useful, perhaps with more input from National, if you need to investigate other behaviour.

Genome.

Edit

Oh , you can also see from the pictures that the circuit regulates at the 'threshhold' plus the ripple. If it falls over and the ripple becomes large then the output voltage, average, will possibly fall out of 'specification'.

Ignoring the mention of the soft start in the data sheet consider the one shot.

When you first apply power the IC will say 'Output Low better trigger the one shot'. If it does not continue to do that, or maintain the PFET on under control of the current limit, until it comes into regulation then it never will get into regulation. Effectively there will be one output pulse and then 'game over'.

Click to expand...

A starting pulse was never observed, but there is a visible one if for example the power is turned on, nothing at the output or very very low output and when switched off it generates a pulse.

OK, let me also update from the practical part.

Remember I started the thread mentioning 2 strange things that in complete contradiction with all the data sheet and National's information made the circuits work - they were using a low Rds MOSFET and the other the little piece of wire added to the Rsen.

Second, National suggested to get rid of the R/C network, the ripple extractor which is added to the feedback, as the output capacitor being tantalum with larger ESR it pehrhaps generates enough ripple and the addition of the extractor will become too big. Of course I already tested the circuit with electrolytic and ceramic output caps.

But I tried this today anyway, without the R3,C1,C2 in the example circuit in the data sheet page 16. A very high ripple was the result until I realized that at least the Cff capacitor, in parallel with Rfb2 should be there. It is calculated according to page 18, Cff=3xTon(max)/(Rfb1/Rfb2).

Same result, output not the the set voltage, ripple, not working in the entire input range.

Almost forgot to mention, everything was recalculated with Iout min. set at 0.1A, in order to avoid the mistake I was afraid of yesterday, which caused the IC to switch between CCM to DCM at "light loads". The inductor's value is highly increased with this setting, to the 220-330uH range.

This is where I decided to explore the "odd" solutions, the first being replacing the MOSFET with SI7461, the one with low Rds and high Qg.
Everything works, I tested the 8.8V circuit over the entire range with diffrent loads, up to 2.5A.
I was afraid the IC will become very hot, but is not hot at all. The diode is quite hot as expected (a B360-13 SMB pack) but the inductor became very hot.
I started to reduce the inductor's value, as most of what I had available were more or less the same packages, so the lower the impedance the higher the current rating.
Setting the clock with every inductor value going down I acieved good and stable results even with 22-33uH !!!.

I checked the output with a scope, looks very clean, very small ripple, no observable noise, no heat... what can I say .... wonderland.

I tried to reproduce the same result on the second circuit, which if you'll look at the board layout has slight changes of the Cout and Cin location (Cin being closer to the switch node if compared to the upper circuit that works). But I forgot that the precision of this 500kHz (sorry, lowered to 250kHz) switcher's parts location is more sensitive than the parts in a microwave antenna so it gave me some trouble, for example not starting at 32V input, I needed to sweep over the input range or turn it on/off a couple of times and then sets stable somehow. This was solved by increasing the Cin.

One thing that arises is that as far as I can see, without taking other action, the circuit as described in the data sheet might suffer from a condition whereby it does not start up or at least not reliably.

Click to expand...

Maybe this is exactly what happens here.

Then, when I thought everything is OK, as with the neighbour circuit, I observed that somewhere between 16-17V at input, the output becomes unstable. It is a precise point where this happens. I will not go over all the games with all the parts I spent almost 10 hours on, let me conclude and say that no matter what, the second circuit refused to work like his twin on the same board.

It is hard to believe that a small change in a component location can cause such a severe behaviour change.

At this point I remembered the second thing that made the board work, the little wire I used to attach a larger Rsen, described in my first post.

So I replaced the Rsen SMT resistor with a temporary TH and works.
I made a small cut in the Vin track, just next to the Rsen location and made place for a second resistor in series. I re-assembled the 25mohm Rsen and placed another one in series.
The Vin pin #8 was feeded between the 2 resistors, meaning input passes a 25mohm resistor and then goes to Vin and continues to Rsen. Not exactly a Kelvin connection, but guess what... works, very stable.

Now the task was to raise the output to the needed 15V for this circuit. Well until I left it refused to raise above 9V, no matter what I do. The 9V is stable with load and input voltage changes like a rock, but impossible to raise it above this.

Here is where I observed a very strange thing: The frequency was supposed to be approx. 250kHz, but on the scope I got only 150kHz, slightly changing with the input.
It looks like the Rt has no effect on the frequency, I tried to change it anywhere between 90-620K, it is "locked" around 150kHz.

I replaced the added resistor with a little piece of wire, just as I did the first time by mistake, and exactly the same, output very stable at about 9V but frequency impossible to change.
The signal at the MOSFET gate is clean pulses, I forgot to look at the duty cycle as I was concentrating on the frequency.

What on earth is this little piece of wire doing? By the way, if shorter than 10mm has no effect, but no matter at what side of the resistor is added it works.

If I'll try to put everything together, let's remember that the first 3 circuits, on the aluminum PCBs are all working and layout far from being optimal.
So what may be wrong with this one? How can everything be so sensitive even at low frequecies?

Sorry for your hair, believe me that I really appreciate your willing to help and the time invested.
I thought maybe to send you a board but I guess you will blame me for more hair you will loose if you switch to practical experiments.