need help to write VHDL program for AIP and LvP based algo for cache memory

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sudhirsingh

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Hi to all,
I need help to write VHDL program for replacement algorithms: Access Interval
Predictor (AIP) and Live-time Predictor (LvP).plz help me out,as i have to submit report this month.


Thanks and Regards
 

Hi sudhirsingh,

Please try to implement the code first. If you have any problems in design we can give some idea or suggestions.It shows your laziness. Otherwise this is not correct place to ask this. you can search in opencore.org.
 

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