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| #include "msp430x22x4.h"
#include "mrfi.h"
#define MRFI_RADIO_FAMILY1
int count=0;
void main(void)
{
WDTCTL = WDTPW + WDTHOLD;
BSP_Init();
MRFI_Init();//initalize 6 pin wire connection between cc2500 & msp430
MRFI_WakeUp();//wakes radio up
MRFI_RxOn();//turn radio into receiving mode
TACCTL0 = CCIE;
TACCR0 = 37500;
TACTL = TASSEL_2 + MC_1 + ID_3;
P1DIR |= 0x03; // P1DIR = P1DIR | 0x03 Set P1.0, P1.1 to output direction
P1OUT &= ~0x03;
__bis_SR_register(GIE);
TACCTL0 &= ~CCIE;
for (;;)
{
if(count>=0&&count<=15)
{
TACCR0 =37500; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
ADC10CTL0 = SREF_0 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE;//using Vcc and gnd for reference, 64 clks/sample, turn ADC on and enable interrupts
ADC10CTL1 = INCH_0;
ADC10AE0 |= 0x01;
ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
if (ADC10MEM <0x50)
{
P1OUT |= 0x01;
P1OUT &= ~0x02;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='A';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
else if (ADC10MEM > 0x50)
{
P1OUT |= 0x02;
P1OUT &= ~0x01;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='X';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
ADC10CTL0 &= ~ENC; // Clear ENC to stop conversion
ADC10CTL0 = 0;
}
else if(count>=16&&count<=30)
{
TACCR0 = 37500; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
ADC10CTL0 = SREF_0 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE;//using Vcc and gnd for reference, 64 clks/sample, turn ADC on and enable interrupts
ADC10CTL1 = INCH_1;
ADC10AE0 |= 0x02;
ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
ADC10AE0 |= 0x02; // P2.1 ADC option select
if (ADC10MEM <0x50)
{
P1OUT |= 0x01;
P1OUT &= ~0x02;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='W';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
else if (ADC10MEM > 0x50)
{
P1OUT |= 0x02;
P1OUT &= ~0x01;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='Y';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
ADC10CTL0 &= ~ENC; // Clear ENC to stop conversion
ADC10CTL0 = 0;
}
else if(count>=31&&count<=45)
{
TACCR0 = 37500; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
ADC10CTL0 = SREF_0 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE;//using Vcc and gnd for reference, 64 clks/sample, turn ADC on and enable interrupts
ADC10CTL1 = INCH_2;
ADC10AE0 |= 0x04;
ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
ADC10AE0 |= 0x04; // P2.2 ADC option select
if (ADC10MEM <0x50)
{
P1OUT |= 0x01;
P1OUT &= ~0x02;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='E';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
else if (ADC10MEM > 0x50)
{
P1OUT |= 0x02;
P1OUT &= ~0x01;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='Z';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
ADC10CTL0 &= ~ENC; // Clear ENC to stop conversion
ADC10CTL0 = 0;
}
}
}
#pragma vector=ADC10_VECTOR
__interrupt void ADC10_ISR(void)
{
__bic_SR_register_on_exit(CPUOFF); // Clear CPUOFF bit from 0(SR)
}
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
if (count == 45)
{
count = 1;
}
else
{
count++;
}
}
void MRFI_RxCompleteISR()
{
} |