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Need Help, How to pick up TSMC lib file for Gate SIM?

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binliu

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Dear All,

I was trying to get a gate sim running in my environment. There are components from TSMC library in the Gate level netlist that I need to include to the compile file. We use compile.xml as compile spec for all design/test file for makefile to pick up during compile stage. However, i couldn't find a compile.xml file in the given TSMC libraries. Just wonder, what is a good way of doing it so that in Gate sim, the TSMC library will get picked up by the SIM? I am using modelsim right now, if it is related....

Thanks a lot!
Bin
 

Hi Bin,

I've recently done a TSMC gate level simulation.

Normally the gate library will be in the form of a big verilog file (or several files), and you need to edit your compile script to include this.

If you're using ModelSim, you need to invoke vsim with the -L option to point it at the technology library.

If your testbench is not written in Verilog, you'll need a mixed Verilog/VHDL/SystemC/whatever license.

If you haven't done a gate level simulation before, be prepared for all sorts of problems. If your design is large it will quickly consume huge amounts of RAM. You may find there are issues with your simulation filling with X values - if that's the case, look to your RAM models and any undriven inputs, which are prime candidates for X propagation.

Good luck!
Siskin
 
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    binliu

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Thanks siskin!

This is what I did...
I found a library directory from the pool, and add a VSIM_OPT += -L {LIB_PATH}

I saw modelsim picked up the lib, but i then got a fatal error complaining about the lib is outdated... That's because the lib is compiled using an older version of modelsim... I am contacting the person who generate the lib right now...

Thanks
Bin
 

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