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Need help for the behaviour simulation of DAC

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gdhp

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Hi all
How can i start the behaviour simulation of DAC. Can some one show some examples about it?

Thank you !

gdhp
 

If you have Cadence EDA tools, the best starting point is to use Verilog-A behav. model included in 'ahdlLib'. From there you can add extra features/non-idealities to that model and make your DAC model more realistic.
 

And u can use verilog-spectre or veriloghspice in order to simulate it.
 

thank you willyboy19 and limingchou for your help.

i want to use the matlab simulink. Can i use the isource and resistance as a current unit? How can i model the mismatch?

is there something like the moto-carlo simulation in matlab?

thankS!
 

?????
 

no one can give me some suggestions?

Added after 1 minutes:

Or has someone some suggestions about the segment of current-steering DAC. How to think about the segment?
 

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