Loq
Junior Member level 2
We are designing PECL Logical functions and we have several questions about such a design.
1)how to produce the PECL termination power supply (1.3V sink). Now we use standard regulators "reverse" mounted (Gnd pin connected to 3.3V) but maybe there is a better solution.
2) about termination decoupling, the 1.3V sink supply should decoupled versus gnd or versus 3.3V reference rail. In this case, if we work with only 2 layers board, should we place a 3.3V plane under PECL functions (and not a gnd plane) and can it work? In general, 1.3V sink supply seems to be decoupled only versus Gnd (wich is not the PECL reference level).
Some general questions but your background could be very helpful for us.
Thanks
Loq
1)how to produce the PECL termination power supply (1.3V sink). Now we use standard regulators "reverse" mounted (Gnd pin connected to 3.3V) but maybe there is a better solution.
2) about termination decoupling, the 1.3V sink supply should decoupled versus gnd or versus 3.3V reference rail. In this case, if we work with only 2 layers board, should we place a 3.3V plane under PECL functions (and not a gnd plane) and can it work? In general, 1.3V sink supply seems to be decoupled only versus Gnd (wich is not the PECL reference level).
Some general questions but your background could be very helpful for us.
Thanks
Loq
