Q. How does Xilinx measure density?
Xilinx measures density in terms of system gates, using the same basic measurement established with the Virtex family. It is a combination of logic, memory, and custom circuit resources that would be utilized in a typical design. The system gate estimate is found in typical designs using a portion of the resources available on the device. This does not count a sum total of all the logic, memory, and custom circuit resources available on each device. Of course, each design uses a different amount of logic and memory, so the density measurement will vary. If a design uses only logic portion of the resources on the devices, the achieved density will be far less than if the design were to use both the logic and a good portion of the memory.