a clock of 10MHZ is given, we need this clock to generate another clock that has the same frequency as the original one, so that these two clocks could be used to control a switch cap circuit, any one have any idea how how to design this clock generating circuit?
where is it from, could i have more details? if the clock frequency is slightly diferent, do i have to modify anything? to implement those gates (use complementary cmos logic)in 0.35um technology,what need to be paid attention? is there any simpler circuit could do the job?