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Need advice on opamp design

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richloo

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Hello, i am lack of experience in choosing different type of topology in opamp design. Practically, for 2 stage classical & folded cascode opamp, what is the highest gain or gain bandwidth product that they can hit? My application is high frequency filter, is it possible to use opamp-RC rather than gm-C?
Thanks in advance.
 

the performance of opamp architechture depends on
process, try sc-filter for ur hf-filter maybe a better solution
 

2 stage opamp can match you need. cascode opamp can give the high gain above 80db
 

both them you can use

and Gm_RC is better for high frequency
 

I have completed a 2 stage opamp with GBW of 330MHz, DCgain=60dB, GM=20dB and PM=54 degree. I found that i can't go beyond 3rd order unity gain 200MHz SallenKey LowPassFilter since the o/p signal is out of phase.
Can anyone give any comment/suggestion/solution?
 

BTW, the filter i m using is Butterworth... Thanks in advace...
 

richloo - that is a fast amp, what process did you draw in?

i would suggest gm-C instead of op-RC. if your overall amp is 330MHz, the diff pair is probably 500+MHz. Using gm's instead of opamp means you don't have the parasitic poles from an output stage.
 

richloo said:
I have completed a 2 stage opamp with GBW of 330MHz, DCgain=60dB, GM=20dB and PM=54 degree. I found that i can't go beyond 3rd order unity gain 200MHz SallenKey LowPassFilter since the o/p signal is out of phase.
Can anyone give any comment/suggestion/solution?

I see 300MHz bandwidth. What opamp did you use?
 

I used 0.18um CMOS, 2 stage opamp. but the transient response have slow rise time... can anyone tell me how to improve on this? thanks in advance...
 

electronrancher:
thanks for ur advice. i just wish to start gm-c but i can't coz i m running out of time. i am using 0.18um SCMOS. Since u said that it is a fast amp, from ur experience and with the simulated GainMargin & PhaseMargin, do u think possible to go to higher order (>3) filter? how to "tweak" it? thanks in advance.
 

You can download the useful E-book
"Inroduction to CMOS OP-AMPS and comparators" by R.Gregorian



It contains the answers to many practical questions.
 

What about you change the input differential pairs from PMOS to NMOS? NMOS is faster than PMOS. Anyway the noise will be higher.
 

thanks yeechyan! i have tried NMOS diff input pair n it is ok. but only little improvement... :(

i begin to try gm-c, if i wan to drive both resistive and capacitive load, how can i do that w/o introducing additional pole? an inverter?
 

richloo said:
thanks yeechyan! i have tried NMOS diff input pair n it is ok. but only little improvement... :(

i begin to try gm-c, if i wan to drive both resistive and capacitive load, how can i do that w/o introducing additional pole? an inverter?


maybe you replace your first stage with a folded cascode
 

chency: do u mean that i have to replace only the diff pair stage?

regard
 

the structures of the picture is very useful.
 

The filter performance is function of the parameters of opamp and the value of capacitor and resistor.

On one hand, you should optimize the opamp , also do the value of resistor and capacitor.

The resistor and capacitor is load of the opamp . If their value is large , the opamp is work in the large and small signal region, then you can increase the slew rate of the opamp. If the filter process the small signal , the opamp work in the linear region , the bandwith is dominate .

I think you can improve the bandwith , slew rate and output impedance in the mean time.
 

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