Reply to thread

no i do not use a blocking capacitor

if you can i will be much obliged. I done a simulation in Matlab to verify the control loop but not in LTspice

the thing i can't understand is whether this voltage waveform is normal or do i need to do something about it. I want to clearly understand why that voltage bump appears in the primary.

My guess is ,this is the voltage seen at the primary due to resonation of transformer leakage inductance and Mosfet's Coss capacitors in the deadtime

Am i Achieving the zero voltage switching or do i need to adjust the dead time or maybe increase the leakage or add a shim inductor