jeleroy
Junior Member level 1
Hello,
I have to convert an old ASIC from LSI, gate level has been generated under pseudo verilog net list.
I suppose this net list is under NDL format.
Could somebody give me some information about this gate format, or any clues about tools able to convert this ndl format in verilog format. More, where could I download the lcb500K library for synopsys.
Who can help me ?
Thanks by advance.
Jean-Eric
I have to convert an old ASIC from LSI, gate level has been generated under pseudo verilog net list.
I suppose this net list is under NDL format.
Could somebody give me some information about this gate format, or any clues about tools able to convert this ndl format in verilog format. More, where could I download the lcb500K library for synopsys.
Who can help me ?
Thanks by advance.
Jean-Eric