n bit decoder binary to 7seg

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amin5659

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hi all.
i want to design a n bit decoder binary to 7 segment.
the problem that i faced is that i cant find the number of output lines.....
i mean for n=4 the the max number is 15 that need 7*2 output lines
and n=5,6 too.
but for n=7 the max number is 127 that have 3 number also needs 7*3 output line and....It continues to grow with a pattern.but i cant find out a formula for that....
please help me..
regards.
 

i didnt under stand that.
log(10)=1 isnt it?
so the formula become to ceil(n*log(2))????
and what is ceil??????!
 

oh.you are right.about ceil i apologies honestly i knew that with different name because my english isnt well.
and about the formula if we add 1 thats be correct.
really thanks.you was very help full.
 

and about the formula if we add 1 thats be correct
Click to expand...
No, you don't add 1. Just use the smallest following integer...

E.g. 7*log(2) = 2.1
Number of digits = ceil(2.1) = 3
 
another question.i define n as integer.
when i want to define output like this:
out std_logic_vector (ceil(n*(log(real(2)))-real(1)) downto 0)
i receive this:* can not have such operands in this context.
==========
and when i change than to this:
out std_logic_vector (ceil(real*real(log(real(2)))-real(1)) downto 0)
i receive this:Range declaration does not match type definition.
======
can you help me??

- - - Updated - - -

i am waiting for answer.....
 

another question.
when i want to define entity like this:entity ex2 is
generic(n:integer:=13);
port(
i:in std_logic_vector (n-1 downto 0);
out std_logic_vector (n*(log(real(2)))-real(1) downto 0)
);
end ex2;
i receive this:* can not have such operands in this context.
and when i change output to thisut std_logic_vector (real*(log(real(2)))-real(1) downto 0)
i receive this:Range declaration does not match type definition.
how can i define output for this correct.please help me.
 

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