My FPGA board layout, any comment?

[zsuhh]

Placement layer:


Top layer:


Gnd layer:


Power layer:


Bot layer:

 

[amit.kumar11]

Hi,

Please let me know, which FPGA you are using. what are the voltage levels?

 

[manspcb]

Hi,

Are there diff pairs on the bottom?
If so they cross split planes on layer 3 that is not right.
They must see a constant gnd or power plane.

 

[zsuhh]

No any diff pairs on the bottom.

 

[andre_luis]

If the two connector pairs on above and bellow side are not being used for fastening purpose and it is expected connect for instance a flat cable, you could keep them apart due the edge of one may overlap the space needed to connect the other cable.

 

[Mattylad]

OK - whats this?


Move the tracks circled in black down so the via circled in blue can be moved so the loop in the track in the top pic can be removed.


I'm not so sure it's a good idea to have copper pour on BGA pads


It always take another pair of eyes to spot something small that could be better.
What software was this done in?

 

[zsuhh]

Thank you very much. I am using allegro to layout.

- - - Updated - - -

spartan 6. voltage is : 3.3v, 1.2v, 1.8v

Hi,

Please let me know, which FPGA you are using. what are the voltage levels?

- - - Updated - - -

Thank you very much. I am using allegro to layout.

OK - whats this?
View attachment 119090

Move the tracks circled in black down so the via circled in blue can be moved so the loop in the track in the top pic can be removed.
View attachment 119089

I'm not so sure it's a good idea to have copper pour on BGA pads
View attachment 119088

It always take another pair of eyes to spot something small that could be better.
What software was this done in?