Multiplexer Design/ Application using CD4051b

[wfg42438]

Hello Everyone,

Below is a simple multiplexer design i wanted to implement, please let me know if you see anything wrong with my thought process

Goal:
If a seven segment display shows value 6: output 500Hz tone,
For a value of 7 utput 2kHz tone
or if a value of 8 is displayed: output a 5kHz tone


The three tones described earlier have already been designed using 555 timers in the astable mode and they work




I noticed the following segments of the 7 segment display are shared by the three values values: f, a, & b

For a value of 6 we have the following: f=1, a=1, b=0 ----> therefore we have the value 110 ----> 500 Hz tone connected to Ch.6
For a value of 7 we have the following: f=0, a=1, b=1 ----> therefore we have the value 001 ----> 2kHz tone connected to Ch.1
For a value of 8 we have the following: f=1, a=1, b=1 ----> therefore we have the value 111 ----> 5kHZ Hz tone connected to Ch.7


Therefore we take a lead from pin "f" (either before or after the resistors going to the seven segment displays) to C of the MUX,

a lead from pin "a" of the display to B of the MUX

a lead from pin "b" of the display to A of the MUX

Once this is done we should see no tone for values 0-5 and three distinct tones for 6, 7 & 8

Please note this was all done under the assumption that when a segment of the display i shut off its a logic low and when lit its considered a logic high








Link to Datasheet: https://www.ti.com.cn/cn/lit/ds/symlink/cd4051b.pdf

 

[KlausST]

Hi,

we should see no tone for values 0-5

No.
You will get sound with numbers: 0, 2, 3, 5, 9 also.

Klaus

 

[wfg42438]

Why is that if I'm only using three input lines?

Can you please elaborate?

 

[KlausST]

Hi,

Why is that if I'm only using three input lines?

It´s BECAUSE you use only 3 input lines. You need more inputs.

For a value of 6 we have the following: f=1, a=1, b=0 ----> therefore we have the value 110 ----> 500 Hz tone connected to Ch.6

But "5" has the same code "110", they differ in segment "g", but you don´´t decode segment "g".

The same is with the other codes.

Klaus

 

[betwixt]

If I got this right:

LED    a b c d e f g     MUX   channel
                            CBA
0    1 1 1 1 1 1 0    111        7
1    0 1 1 0 0 0 0    001        1
2    1 1 0 1 1 0 1    011        3
3    1 1 1 1 0 0 1    011        3
4    0 1 1 0 0 1 1    101        5
5    1 0 1 1 0 1 1    110        6
6    X 0 1 1 1 1 1    1X0        4 / 6
7    1 1 1 0 0 0 0    011        5
8    1 1 1 1 1 1 1    111        7
9    1 1 1 0 0 1 1    111        7

The 'X' depends on whether the top segment (a) is used to display '6'.

In most cases the segments outputs would be low to light them though.

So no, it won't work!

Brian.

 

[wfg42438]

If I got this right:

LED    a b c d e f g     MUX   channel
                            CBA
0    1 1 1 1 1 1 0    111        7
1    0 1 1 0 0 0 0    001        1
2    1 1 0 1 1 0 1    011        3
3    1 1 1 1 0 0 1    011        3
4    0 1 1 0 0 1 1    101        5
5    1 0 1 1 0 1 1    110        6
6    X 0 1 1 1 1 1    1X0        4 / 6
7    1 1 1 0 0 0 0    011        5
8    1 1 1 1 1 1 1    111        7
9    1 1 1 0 0 1 1    111        7

The 'X' depends on whether the top segment (a) is used to display '6'.

In most cases the segments outputs would be low to light them though.

So no, it won't work!

Brian.

Would there be another combination i can use?

Also is the assumption that when the a segment of the display is not lit we can consider a logic low?

 

[KlausST]

Hi,

Would there be another combination i can use?

I assume you need at least 5 signals to decode.

Also is the assumption that when the a segment of the display is not lit we can consider a logic low?

Datasheet will tell you.
If you are in doubt, then connect pull down resistors.

Klaus

 

[betwixt]

I'm assuming this topic is related to the one using a counter to generate the numbers being displayed. If that is the case, the segement drive signals are not the best way to do it, use the binary value feeding the segment decoder instead. This would give you an increasing binary number instead of the pattern of segments. If you ignore the LSB (D0) and connect D1, D2 and D3 to the ABC inputs of the 4051 it will select the channels in sequence.

Regarding the polarity of ssegnment drive signals: if you look at the data sheets for various 7-segment decoder/driver ICs you will see they almost all expect common anode displays (unless other drivers components are included) so the cathodes are pulled low by the driver IC. So an 'on' segment is normally a low at the decoder output.

Brian.