P
Pavlanto
Guest
Hi,
I have loaded a verilog file in Cadence virtuoso in which i implement an 8 to 3 encoder.As an input i have an 8bus wire.In the code i used an array with 8 bits for input and 3 bit for output.I want to run a test in the schematic.How can i give an input with 8 values??
I have loaded a verilog file in Cadence virtuoso in which i implement an 8 to 3 encoder.As an input i have an 8bus wire.In the code i used an array with 8 bits for input and 3 bit for output.I want to run a test in the schematic.How can i give an input with 8 values??