Multi voltage Design Issues

[Simranjeet Singh]

Hi,
I need some clarification on multi voltage design.

Lets say a particular instance in my design is running on two different voltages. In normal mode it runs on 1.2 volts and in special mode it runs on 0.8Volts.
How is that done?
I mean every cell in that instance will be linked to a library characterized by a particular voltage. So how can it accomodate two different voltages?
Somebody told me that every cell is linked to two different libraries. I mean how is that possible?

Please Clarify?

Regards
Simranjeet

 

[dftrtl]

Every cell is characterized at two volatges what you required. Here at 1.2 Volts you close hold because it is faster corner and at 0.8 volts you close setup as the corner is slower.
I mean to say you have close timing using libraries of both voltages

 

[Simranjeet Singh]

Thanks for the reply.
I do not have any issues related to setup time or hold time.
The design is a low power based design where in normal mode the design runs on full power while on low power mode we bring the voltage down for some power domains in the design.
The way it is done is done is, when we change the power mode, the cells in a particular power domain get linked to some other library characterized by the voltage as defined in the power mode.
My question is, how can a cell be associated with two libraries. I mean doesn't that mean we have two different netlists?

Regards
Simranjeet

 

[dftrtl]

Sorry did not understand your question.

 

[Simranjeet Singh]

A chip can be in different power states like: sleep mode, hibernating mode, stand by mode, shutdown mode etc. Right?
In different power modes, different instances will be running on different voltages. For example an instance may be running at 1 volt in normal mode while in sleep mode it runs on 0.5 volts
We define these power modes of the design in CPF or UPF file where we specify that in a particular mode, which instance will be associated with which library according to the voltage the instance runs on.
So my question is, how can the instance be linked to more than 1 library?

 

[oratie]

You should enlist all your corner libraries (characterised for different voltages, so they must have different operating_conditions name) in the link_library. Then, you may manually specify set_operating_condition for each subdesign. Or, the tool may associate voltage (taken from UPF) with appropriate library (again, through operating_conditions).

 

[jeevan.life]

Thanks for the reply.
I do not have any issues related to setup time or hold time.
The design is a low power based design where in normal mode the design runs on full power while on low power mode we bring the voltage down for some power domains in the design.
The way it is done is done is, when we change the power mode, the cells in a particular power domain get linked to some other library characterized by the voltage as defined in the power mode.
My question is, how can a cell be associated with two libraries. I mean doesn't that mean we have two different netlists?

Regards
Simranjeet

You don't need two netlists for multi voltage analysis. Since it is the same cell which you are using with two different voltages, and you have UPF, you know the voltage the cell will be working on in particular mode. So you can use voltage scaling and provide two lib files which cover the operating voltages. Let the STA tool pick the delay tables from the corresponding lib characterized for the operating voltage.