MSP430 PWM Resolution Limit

Dear all,

I am limited to this microcontroller: MSP430I2020. It has 16MHz clock, 16bit timer. I need it for controlling a switch at a frequency of 200KHz, probably in this case I will have around 1% Duty cycle step and I need at least 0.01%. Does anyone have a solution?

Thanks in advance.

Hello!

There is no miracle. If you divide your 16 MHz clock by 200 kHz, you can have timer periods of 80.
Therefore you have some 1.25% steps. If you need 0.01% (i.e. timer value of 10000) and 200 kHz, then
you need something with a clock at 2 GHz. Or you can look at TI's C28 series where you have a
PWM resolution of 150 ps.

Dora.

Thank you for your reply.

Actually, I am working in my thesis on optimization of resonance DC/DC converter for space application, the input voltage is 10V and the output voltage is 5KV (voltage multiplier is used), almost no current at the output. The PID controller should have a fine tuning, otherwise the output voltage will have around +-50V which is a real problem. The power consumption is a serious issue in the design, the controller overall should not exceed 20-30mW. Choosing the MSP430I2020 was based on these requirements:

-Multiplier: 16*16
-ADC: 16 or 24bit Resolution
-UART
-Temp: -40 to 105

Probably, the proposed TI C28x will consume a huge amount of current. Do you have any alternative suggestions at this point even if it's built from discrete components?

Thanks once again.

Hi,



do you really need the 0.01% for the entire 0...100% range?


is it possible to PWM the LSB to get a better resolution?

is it possible to reduce PWM frequency? (especially at lower duty cycle)

is it possible to use "burst mode PWM"


Klaus

Hello,

Actually Duty cycle range 0-50% and less than 0.1 step is necessary, the frequency should be fixed around 200KHz at resonance. I dont think that "burst mode PWM" is useful in our case. Could you please tell me how to modulate LSB or how to realize it on MSP430?

AAOAA

Hi,

it´s just an idea to PWM the LSB.

Imagine a 200kHz PWM is the same value - maybe 79 for 10 cycles. Or you could output the PWM in a sequency like this: 79 - 79 - 78 - 79- 79 - 78 - 79 - 79 - 78 - 79

its 7 times 79 and 3 times 78, so you get sub-LSB resolution with an average of 78.7

For sure this causes extra jitter ... but maybe it´s worth a try.


Klaus

Hi again,

Is this the so called "PWM Dithering"?

I have 16MHz clock, 200KHz PWM frequency, 6 bits duty cycle resolution.

Do you think it is practically possible to add extra 6 bits by this method?

Regards,
AAOAA

Hi,

Yes, PWM dithering is the name for this.

The number of bits is not the problem.
The promlem is the timing. You need an interrupt for every pwm cycle. 200kHz --> 5us. Within this time you need to calculate the new pwm value, and output it. Plus overhead stepping into ISR and out.

The calculation is easy.
Two 8bit registers: one as dither value, the other as sum value.
Every pwm cycle: sum = sum + dith
On every sum overflow add 1 to your pwm value.

This gives a 1/256 dither.

Klaus