MP3 decoder chip built with PLD and VHDL

i'm working on it! ,,,
Ok ,,,, I appears that those files were crated with Open foundation and they are in schematic form .I tried to create a new project unde ISE 6.2 and is able to add the files to a project ,.But it won't read that old format

By usign E-estudio i was able to convert the Edif 2.0 into VHDL code .
But the thing is that the original design was done with schematics instead of a high level language .. then it means that xilinx hardware primitives were used so .is not the best form of code .. Because the Vhdl code i produced reflects those primitives is basically a NETLIST ..
I also produced an Orcad schematic .. I think that is too envolving to put it to work with another architecture . And also WE DON'T know if this thing WORKS


Did my best

Ok .. I was able to read it all with Active HDL ..But once again is a low level design done with hardware primitives , Well you know like in th old days .You select your gates and flip flops ,,And if you know what you are doiing it may work ,..So i Active hdl the people that did Open Foundation can open this design ...

Finally i manage to print it to a Acrobat PDF file ( this time you can use ACROBAT ) .. Print it and try to glue it together !

I will post the lower level blocks schematics . I think by having an idea on how the design is structured , i can be easily be MANUALY translated into VHDL. ..

Ehhmm...but this is absolutely NO mp3 decoder in FPGA (o;

Looks more like the Xilinx appnote using FPGA as addon in an IDE mp3 player using seperate mp3 decoder chip STA013...

You might be right Davorin .. I was so taken in trying to read the project .There is no MP3 funtionality blocks here i thougt that it would be one of the underlaying blocks . But yes is just Glue logic dealing with memory and the IDE interface ..

Well sorry folks .. Feel fre to erase it !!!!!!!!

hi
can anyone pls help me and explain to me about IMDCT and filterbank in Mp3 decoder?

theint