[Moved]: which kind of crystal is suitable as PLL reference input

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zhangljz

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Hello,

I am new to PLL design, and I am facing a problem that which kind of crystal should I use for the input reference clock, crystal or crystal oscillator ?

Several questions:
1: oscillator output type is 'CMOS' means it is square wave ?
2：For PLL which kind of output type is better ?
3: The rise/fall time is usually 5ns, which is much larger than that of divider's output. Will this cause noise, and how to solve ?
4: Which kind of IOs should be used for the reference clock input? Because the core voltage is 1.2V, but the output of oscillator usually is higher than this voltage. Maybe I can use a GPIO to convert 3.3V to 1.2V, but GPIO usually is noisy


The reference frequency required is 10MHz, and regardless of cost.

Thank you
 

A crystal by itself will give you nothing, and a crystal pin-pair
will likely be more work to get running, clean up, characterize
and prove reliable than you are ready for. You want a known-
quantity clock-in-a-can (crystal oscillator) and depending on
your accuracy and stability requirements, possibly some more
special subspecies (TCXO, OCXO, ...).

10MHz is your happy place, cost-wise.

5nS is mighty leisurely and depending on ambient EMI could
give you a lot of reference jitter. You should prefer (if you
can get and use) something like LVPECL oscillator output and
clock input. CMOS outputs (often 5V) are more common but
will put you through some hoops when you're talking low
voltage logic receiving, and slow as you note. However you
should realize that the prop delay spec encompasses a
stated load, which includes half of rise/fall transition times,
and yours should be well less. Whether you can put a sane
and better number to it, wants checking. But a higher native
speed output format (which also is supported in your foundry
I/O library) would be best.
 


As a PLL reference at 10 MHz, try to choose the best available crystal oscillator for best results.
There are many 10 MHz OCXos on the market. Ovenized means a good short-term stability. TCXOs are good even in low-cost versions but should be selected over ambient-temperature drift.
CMOS output means square-wave but as the 10 MHz signal is multplied in PLL chain, it does not matter.
For accuracy and very long-time stability, you may consider connecting a rubidium standard as a temporary reference.
If you need a low phase noise, select a mechanically well-designed OCXO, some types are installed in rubber-spring mounts, to reduce vibration that affects close-to-carrier PN.
 

PLL's have many purposes for scaling up or down , fractions, digital clocks, RF clocks, time of day clocks.
Crystals are chosen when the design has a need for tight specifications but lowest cost.

Otherwise TCXO's are very accurate (<2 ppm) and easy to use.

Voltage, stability and temperature requirements are mandatory when making any choice. Voltage conversion can easily be done with level-shifter or buffers or resistor divider, depending on other demands.

Common abbreviations for reference designations are;

X ( just crystal )
XO ( crystal osc)
TCXO ( temp compensated XO)
VCXO ( voltage controled XO)
OCXO ( oven controlled XO)
DT-VCXO ( digital tune v-controlled XO)
..etc...

1st 4 are generally "AT" cut crystals. OCXO is always SC "Cut" which is >100x more cost, Q and stability and low phase noise.
 

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