M.S., I presume means master of science.
The post would make sense in the Analog IC Design or possibly ASIC Forum.
Hello sir,
sorry for asking unclear question, here i explain them
MS means Master of Science , It is equivalent to M.Tech degree.
I am doing it in the field of VLSI.
Buffer in the sense , it is also a standard cell like AND,NAND,NOR etc. So , i have mentioned
like buffer cell.
up to my knowledge we use clock buffers for clock path optimization and clock tree routing in cts stage of vlsi P&R flow
and normal buffers for data path optimization in vlsi P&R flow.
The thing is that i know how to make use of them in P&R flow , but i don't know how to design a buffer?
But as a part of my MS project i need to design a buffer ?
can any body help me out with your suggestions ?