iimagine
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My two yen:
the flattening out of the top of the waveform looks to me like saturation...awfully close to 5 volts.
/QUOTE]
I suspected this as well, I will reduce the voltage down to half by using R4
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Well, by introducing R4 to the circuit as originally drawn, cutting down ref voltage to half, the flat line is now gone (see attached image). Only the early effect still remains
With all components being the same as post #13.
R3/R4 = 470k/470k
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Errr.....some how my post title is changed, and I cannot post a new respond without being seen as --Updated---
Advice from an electronics veteran: One always learns more from a non_functional circuit than one that works.Since I cannot solve that problem, I've come up with another circuit. I will learn not to trust LTSpice from now on
The simulation may be perfectly right, but you can't hold it responsible for properties of your circuit that aren't modelled, e.g. different transistor parameters (difference between typical and actual transistor parameters, incomplete models, circuit parasitics).I will learn not to trust LTSpice from now on
Could your latest schematic have a similar action, but at a greater current flow, causing the non-linearity which you report?
That mean you are trialing circuits using simulator? The best option is going block by block, you can do all of them with simple blocks of square wave generator and integrator..
It will reduce your time consumption...
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