[Moved]: Please shed light on BSIM3 caps (Cgs, Csg, Cgg et.al.)

[exp]

Hello,

I read about every single post I can find about this topic (so referencing one of those in an answer - I probably have read it already) but I am still confused about it. And I also read the BSIM3v3 manual, chap 4.

I learned about circuit design using equivalent small signal caps. They are 2-terminal devices by construction. Take Cgd. I understand the argumentation with the charge buckets etc - but how on earth would I model this in a small signal way? How does the model change if Cgd is not always Cgd but sometimes Cdg? Would I use Cgd or Cdg for the Miller approximation (on the gate *and* drain side)? Or just roll the dice? :?::?:

Generally, I am confused by the overall definition: Cxy = dQx/dVy.

Take Cgs in a CS amplifier: The cap is between gate and source. According to this definition, it is the the charge on the gate if the source is wiggled. However, the source is never wiggled in a CS amp because it is pinned to ground (except it is degenerated of source). This would imply that Cgs=0 which is nonsense.

I also do not see the symmetry. Ideally, one would expect Cgs = -Csg. However, how can this hold if in the first case I look at the gate charge and then wiggle the source and in the latter case look at the source charge and wiggle the gate? That's completely different to begin with?

Also I have learned that Cgg = Cgs + Cgd + Cgb, Cdd = Cgd + Cdb, Css = Cgs + Csb. All of them are obivously wrong with my BSIMv3 models, even if I replace Cgd by Cdg for example. And even if - how would this possibly hold according to the definition?

Overall, is there just a small signal model that matches the values for Cgs, Csg, Cdg, Cgd et.al.?


Thank you!



PS: I have tons of other caps where I do not find any doc on it. Does anyone know what these are? cap_bd, cap_bs, cbddm, cbebo, cbgbgbm, cbgbm, cbgd, cbgg, cbgs, cbsbm, cdbgbm, cddbm, cdebo, cdgbm, cdsbm, ceebo, cgbg, cgdbm, cggbm, cgsbm, csbg, csbgbm,csgbm, cssbm? When would I need them?

 

[Dominik Przyborowski]

Re: Please shed light on BSIM3 caps (Cgs, Csg, Cgg et.al.)

BSiM 3 and 4 models are not physical models. It is a reason of asymmetry in capacitances, especially for Vgs close to Vth. If You want to get consistent results of simulation You should use models like EKV, PSP or ACM.

 

[exp]

Re: Please shed light on BSIM3 caps (Cgs, Csg, Cgg et.al.)

Hi Dominik, thank you. But what are BSIM models then good for? When I build an analog circuit, I am intrinsically interested in the capacitances.

Also again my main question: How to build a small signal equivalent using these quanitities? Or do you say that this is just not possible? Then I really don't understand why you would ever bother with that stuff ...

An equivalent model consists of a voltage controlled current source with lumped capacitances and conductances all over the place. Call the capacitance between drain and gate "Cf".

But in my case Cgd=-5.11fF, Cdg=-11.35fF. That's off by more than 100%!! It matters if I choose the Cgd or the Cdg value. is Cf now 5.11f, 11.35f, the sum, the average, the difference? Or something more complecated ... but what?

If the signals are reasonably small this is a linear thing it mustbe possible to give a reasonable small signal model...

 

[Dominik Przyborowski]

To calculate the capacitance use values from process documentation (oxide thickness, overlap capacitance per gate perimeter, etc) and calculate it.
In fact classic hybrid PI small signal model is accurate in 20% not more. if You want to use values from simulations using BSIM model, read **broken link removed** about PSP model and look for the capacitance vs biasing curves for both models (PSP and BSIM). it should give You some conclusion, which value You can use.

 

[exp]

Thanks again, Dominik.

To calculate the capacitance use values from process documentation (oxide thickness, overlap capacitance per gate perimeter, etc) and calculate it.

But itsn't that pure geometric approximation and hence even much more inaccurate?

I think I start to understand now. However, if I do not use the devices as switches but as amplifiers, I will usually have large VDS and hence BSIM should suffice (remark: In the meantime I asked if also PSP models are available. They are not, it is an SOI process and only BSIM-SOI models are available).

Why is it that Cgd=Cdg only for VDS=0?

Specifically for the junction caps, it's geometry + bias voltage VSB/VDB, why would they not be symmetric? I just don't see how you can create a small signal model in the first place without having Cgs=Csg or Cgd=Cdg. What's more, When Cgd=50%Cdg, how could the hybrid-Pi model be accurate up to 20%?

 

[Dominik Przyborowski]

remark: In the meantime I asked if also PSP models are available. They are not, it is an SOI process and only BSIM-SOI models are available).

PSP is used in many PDKs provided for example by IBM or ST but I know that unfortunately many PDKs has also only a BSIM in versson 3 or 4

Why is it that Cgd=Cdg only for VDS=0?

Specifically for the junction caps, it's geometry + bias voltage VSB/VDB, why would they not be symmetric? I just don't see how you can create a small signal model in the first place without having Cgs=Csg or Cgd=Cdg.

MOSFET intrinsic capacitances depends in main way to biasing conditions - from top we have gate electrode and oxide as isolator, but at bottom, an electrode is a channel, S/D regions, etc.

Hybrid PI model was good for old technologies in which many small dimension effects doesn't appear. Now is also quite good but only if we use number of corrections for lumped elements and extend it for new effects (or include well known effects not important time ago).

What's more, When Cgd=50%Cdg, how could the hybrid-Pi model be accurate up to 20%?

Using appropriate value of gate drain capacitance small signal model is quite accurate. You shouldn't mix dispersion of circuit model with mosfet model in general ;-)