[Moved]LNA(Low Noise Amplifier) Design

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electronhole

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Hi, I need to design a differential Low-Noise Amplifier (LNA) using the IBM 90nm CMOS process with f0= 2.3 to 2.6GHz, Differential Rin= 100Ω; S11 < -15dB, Voltage gain ≥20 dB, NF ≤2dB, IIP3 ≥-5dBm.
can any one help how to proceed with the design meeting all the contrains with minimum power.
 

Re: LNA(Low Noise Amplifier) Design

I don't think this falls under "elementary" questions :0)
 

Looks like researchers have done this already using a Cascode amplifier, but copywrite protected.

Characteristics Value @ 2.45GHz
Current consumption 12.5mA
S 21 11dB
S 11 -34dB
S 22 -29dB
-S 12 42dB
NF 2.5dB
IIP3 1.0dBm
 

please help...
i am meeting all other specs except the S11
when i am trying to achive the require S11 over the band, i have to decrease the input Q of the circuit and this in turn increases the NF beyond 2dB.. what to do...
 

electronhole said:
please help...
i am meeting all other specs except the S11
when i am trying to achive the require S11 over the band, i have to decrease the input Q of the circuit and this in turn increases the NF beyond 2dB.. what to do...
Click to expand...

You cannot obtain NFmin and best S11 simultaneously.There is a always a compromise between these two.You may use a mathcing circuit after NF matching circuitry.
 

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