[SOLVED] [Moved]: Impact of multiplicity on RF transistors?

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Fávero Santos

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Hello, all. Hope everyone's doing fine.

I'm synthesizing a microwave PA @ 2.4 GHz using sub 200nm CMOS technology. I've choosen cascode topology. The upper transistor configs are: wtot = 400u/multiplicity, number of fingers = 3 and multiplicity = 9.

My doubt: Is there any constraint when using a large multiplicity number as I've used? How the large multiplicity number will affect my layout?

Thank you all

Fávero
 

Fávero Santos said:
Is there any constraint when using a large multiplicity number as I've used? How the large multiplicity number will affect my layout?
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m=9 isn't too large, if you keep the 9 equal units closely together, e.g. in a 3x3 array.
 

More the multiplier, more the parasitic due to layout (more routing connecting different multiplier). But if you are using RF transistor model for the design, I assume the parasitic are well modeled and you will see very little change from schematic to layout results. However, there is a limit on the maximum number of fingers that can be used. Multiplier of 9 is not too large.
 

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