Re: How to keep Id(drain current ) in CADENCE MOS charactarization
Keeping the drain current would appear simple enough.
But if this fails for you, look into how the models are
architected. Some forms of subcircuit modeling (as are
common in RF) put the MOSFET below a subcircuit layer
which isn't named the same as what you see on the
schematic, and thus what would naturally be the "keep"
name of the device*port. You may fail to get the current
at all, or you may get a current which has the MOSFET
but not any "helper" devices' contribution to the net drain
current (e.g. a veriloga "kink" feature added on to model
drain nonlinearities the base model can't). In this case you
either have to educate the PDK (good luck) or interpose
some benign sense element between the drain and elsewhere
(I prefer the presistor as it is always LVS-neutral). Keep
that device's current instead and you have what you need.