[MOVED] efficient fpga realization of digital fir filter using distributed arithmetic

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MURALIMAHARAJAN

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my name muralimaharajan.p doing M.E vlsi design. i need a help from u verilog code for efficient fpga realization of digital fir filter using distributed arithmetic. i attach my block diagram
 

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I think they want someone to write the code for them.
 

Oh The irony

If you need the code, then I suggest you start writing it then...
 

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