[MOVED] differential OTA design procedure

[Natol]

Hi all,

As a novice analog IC designer, I'm working on a simple differential OTA with an active PMOS current mirror load. I'm uncertain about the output swing. Specifically, should I aim to set the output common mode DC voltage (Q point) at Vdd/2? Or should I focus primarily on other specifications like UGF, gain, and slew rate, and then adjust the Q point as needed by introducing a small differential dc voltage at the input? What is the typical approach used in the design process?

For example for vdd = 1.5v after designing my OTA let's say the output Q point is at 1.3v, which is very high, if i want it to be ~ 0.7-0.8 v can i refer back the offset to the input and adjust it from there, I know it will remove the symmetricity between the two sides of the OTA...

Please share your thoughts! Thanks in advance!!!

 

[KlausST]

As a novice analog IC designer,

.. why didn´t you post in the "Analog Integrated Circuit (IC) Design" section then?

You are not alone posting in the wrong section....
To avoid this I asked for a more clear description of the forum sections, but no avail.

Klaus

 

[Natol]

.. why didn´t you post in the "Analog Integrated Circuit (IC) Design" section then?

You are not alone posting in the wrong section....
To avoid this I asked for a more clear description of the forum sections, but no avail.

Klaus

The question pertains to general analog circuit design, which could be relevant in both sections. If such questions are not typically addressed in this section, what types of questions are more appropriate for the "Analog Circuit Design" section?

 

[BradtheRad]

Some of us remember advice back to early years urging that we give op amps a bipolar supply (positive rail and negative rail). Notice about the early 741, that its output could not get within 2V of the negative rail. The bipolar supply makes your life easier if your input signal remains close to the 0V centerline (ground). You can easily adjust the negative rail to provide zero output from zero input.

There's nothing wrong with using a single-ended supply although you need to stay aware of your desired midway voltage at all times.

We'll see the direction this discussion leans regarding what section is appropriate. Is your next step to build this OTA into an IC?

 

[KlausST]

The question pertains to general analog circuit design

The one section is for PCB level design, using ready to buy parts. You use OPAMPs, transistors, resistors, baught from a vendor, and each device comes with a datasheet.
It´s still rather unusual to do analog designs with baught devices running on VDD of 1.5V. But possible.

Where the "Analog Integrated Circuit (IC) design"is for IC level design.
Here you use OTAs, design your own transistor based current mirrors .. on an IC / chip / silicone level.

But If you think it belongs not the the IC design section. ... I don´t want to bother you anymore.

Kaus

 

[Natol]

Some of us remember advice back to early years urging that we give op amps a bipolar supply (positive rail and negative rail). Notice about the early 741, that its output could not get within 2V of the negative rail. The bipolar supply makes your life easier if your input signal remains close to the 0V centerline (ground). You can easily adjust the negative rail to provide zero output from zero input.

There's nothing wrong with using a single-ended supply although you need to stay aware of your desired midway voltage at all times.

We'll see the direction this discussion leans regarding what section is appropriate. Is your next step to build this OTA into an IC?

Thank you for your reply! I am currently designing a CMOS based IC using the SkyWater130 pdk, so when I design a simple OTA. My first goal is to reduce the mismatch and noise effects of the active PMOS current mirror load while adhering to the bandwidth and slew rate specifications for the differential pair, and also gain etc. However, I find that when I try to meet all these specifications, the output does not consistently align with the desired midpoint.

My question is whether I can introduce a dc offset voltage at the differential pair inputs to adjust the output to be perfectly centered, without changing any of the circuit components. Is this practice advisable?